Commit 916fc609 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'pci-v6.3-fixes-1' of git://git.kernel.org/pub/scm/linux/kernel/git/pci/pci 

Pull PCI fix from Bjorn Helgaas:

 - Fix DesignWare PORT_LINK_CONTROL setup, which was corrupted when the
   DT "snps,enable-cdm-check" property was present (Yoshihiro Shimoda)

* tag 'pci-v6.3-fixes-1' of git://git.kernel.org/pub/scm/linux/kernel/git/pci/pci:
  PCI: dwc: Fix PORT_LINK_CONTROL update when CDM check enabled
parents 3df82e42 cdce6709

drivers/pci/controller/dwc/pcie-designware.c

+5 −5
Original line number Diff line number Diff line
@@ -1001,11 +1001,6 @@ void dw_pcie_setup(struct dw_pcie *pci) 
		dw_pcie_writel_dbi(pci, PCIE_LINK_WIDTH_SPEED_CONTROL, val);

	}



	val = dw_pcie_readl_dbi(pci, PCIE_PORT_LINK_CONTROL);

	val &= ~PORT_LINK_FAST_LINK_MODE;

	val |= PORT_LINK_DLL_LINK_EN;

	dw_pcie_writel_dbi(pci, PCIE_PORT_LINK_CONTROL, val);



	if (dw_pcie_cap_is(pci, CDM_CHECK)) {

		val = dw_pcie_readl_dbi(pci, PCIE_PL_CHK_REG_CONTROL_STATUS);

		val |= PCIE_PL_CHK_REG_CHK_REG_CONTINUOUS |
@@ -1013,6 +1008,11 @@ void dw_pcie_setup(struct dw_pcie *pci) 
		dw_pcie_writel_dbi(pci, PCIE_PL_CHK_REG_CONTROL_STATUS, val);

	}



	val = dw_pcie_readl_dbi(pci, PCIE_PORT_LINK_CONTROL);

	val &= ~PORT_LINK_FAST_LINK_MODE;

	val |= PORT_LINK_DLL_LINK_EN;

	dw_pcie_writel_dbi(pci, PCIE_PORT_LINK_CONTROL, val);



	if (!pci->num_lanes) {

		dev_dbg(pci->dev, "Using h/w default number of lanes\n");

		return;