Commit 91562cf9 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'powerpc-6.1-3' of git://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux 

Pull powerpc fixes from Michael Ellerman:

 - Fix a case of rescheduling with user access unlocked, when preempt is
   enabled.

 - A follow-up fix for a recent fix, which could lead to IRQ state
   assertions firing incorrectly.

 - Two fixes for lockdep warnings seen when using kfence with the Hash
   MMU.

 - Two fixes for preempt warnings seen when using the Hash MMU.

 - Two fixes for the VAS coprocessor mechanism used on pseries.

 - Prevent building some of our older KVM backends when
   CONTEXT_TRACKING_USER is enabled, as it's known to cause crashes.

 - A couple of fixes for issues seen with PMU NMIs.

Thanks to Nicholas Piggin, Guenter Roeck, Frederic Barrat Haren Myneni,
Sachin Sant, and Samuel Holland.

* tag 'powerpc-6.1-3' of git://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux:
  powerpc/64s/interrupt: Fix clear of PACA_IRQS_HARD_DIS when returning to soft-masked context
  powerpc/64s/interrupt: Perf NMI should not take normal exit path
  powerpc/64/interrupt: Prevent NMI PMI causing a dangerous warning
  KVM: PPC: BookS PR-KVM and BookE do not support context tracking
  powerpc: Fix reschedule bug in KUAP-unlocked user copy
  powerpc/64s: Fix hash__change_memory_range preemption warning
  powerpc/64s: Disable preemption in hash lazy mmu mode
  powerpc/64s: make linear_map_hash_lock a raw spinlock
  powerpc/64s: make HPTE lock and native_tlbie_lock irq-safe
  powerpc/64s: Add lockdep for HPTE lock
  powerpc/pseries: Use lparcfg to reconfig VAS windows for DLPAR CPU
  powerpc/pseries/vas: Add VAS IRQ primary handler
parents 576e61ce 65722736

arch/powerpc/include/asm/book3s/64/tlbflush-hash.h

+6 −0
Original line number Diff line number Diff line
@@ -32,6 +32,11 @@ static inline void arch_enter_lazy_mmu_mode(void) 


	if (radix_enabled())

		return;

	/*

	 * apply_to_page_range can call us this preempt enabled when

	 * operating on kernel page tables.

	 */

	preempt_disable();

	batch = this_cpu_ptr(&ppc64_tlb_batch);

	batch->active = 1;

}
@@ -47,6 +52,7 @@ static inline void arch_leave_lazy_mmu_mode(void) 
	if (batch->index)

		__flush_tlb_pending(batch);

	batch->active = 0;

	preempt_enable();

}



#define arch_flush_lazy_mmu_mode()      do {} while (0)

arch/powerpc/kernel/exceptions-64e.S

+7 −0
Original line number Diff line number Diff line
@@ -813,6 +813,13 @@ kernel_dbg_exc: 
	EXCEPTION_COMMON(0x260)

	CHECK_NAPPING()

	addi	r3,r1,STACK_FRAME_OVERHEAD

	/*

	 * XXX: Returning from performance_monitor_exception taken as a

	 * soft-NMI (Linux irqs disabled) may be risky to use interrupt_return

	 * and could cause bugs in return or elsewhere. That case should just

	 * restore registers and return. There is a workaround for one known

	 * problem in interrupt_exit_kernel_prepare().

	 */

	bl	performance_monitor_exception

	b	interrupt_return

arch/powerpc/kernel/exceptions-64s.S

+13 −1
Original line number Diff line number Diff line
@@ -2357,9 +2357,21 @@ EXC_VIRT_END(performance_monitor, 0x4f00, 0x20) 
EXC_COMMON_BEGIN(performance_monitor_common)

	GEN_COMMON performance_monitor

	addi	r3,r1,STACK_FRAME_OVERHEAD

	bl	performance_monitor_exception

	lbz	r4,PACAIRQSOFTMASK(r13)

	cmpdi	r4,IRQS_ENABLED

	bne	1f

	bl	performance_monitor_exception_async

	b	interrupt_return_srr

1:

	bl	performance_monitor_exception_nmi

	/* Clear MSR_RI before setting SRR0 and SRR1. */

	li	r9,0

	mtmsrd	r9,1



	kuap_kernel_restore r9, r10



	EXCEPTION_RESTORE_REGS hsrr=0

	RFI_TO_KERNEL



/**

 * Interrupt 0xf20 - Vector Unavailable Interrupt.

arch/powerpc/kernel/interrupt.c

+11 −3
Original line number Diff line number Diff line
@@ -374,10 +374,18 @@ notrace unsigned long interrupt_exit_kernel_prepare(struct pt_regs *regs) 
	if (regs_is_unrecoverable(regs))

		unrecoverable_exception(regs);

	/*

	 * CT_WARN_ON comes here via program_check_exception,

	 * so avoid recursion.

	 * CT_WARN_ON comes here via program_check_exception, so avoid

	 * recursion.

	 *

	 * Skip the assertion on PMIs on 64e to work around a problem caused

	 * by NMI PMIs incorrectly taking this interrupt return path, it's

	 * possible for this to hit after interrupt exit to user switches

	 * context to user. See also the comment in the performance monitor

	 * handler in exceptions-64e.S

	 */

	if (TRAP(regs) != INTERRUPT_PROGRAM)

	if (!IS_ENABLED(CONFIG_PPC_BOOK3E_64) &&

	    TRAP(regs) != INTERRUPT_PROGRAM &&

	    TRAP(regs) != INTERRUPT_PERFMON)

		CT_WARN_ON(ct_state() == CONTEXT_USER);



	kuap = kuap_get_and_assert_locked();

arch/powerpc/kernel/interrupt_64.S

+11 −2
Original line number Diff line number Diff line
@@ -532,15 +532,24 @@ _ASM_NOKPROBE_SYMBOL(interrupt_return_\srr\()_kernel) 
	 * Returning to soft-disabled context.

	 * Check if a MUST_HARD_MASK interrupt has become pending, in which

	 * case we need to disable MSR[EE] in the return context.

	 *

	 * The MSR[EE] check catches among other things the short incoherency

	 * in hard_irq_disable() between clearing MSR[EE] and setting

	 * PACA_IRQ_HARD_DIS.

	 */

	ld	r12,_MSR(r1)

	andi.	r10,r12,MSR_EE

	beq	.Lfast_kernel_interrupt_return_\srr\() // EE already disabled

	lbz	r11,PACAIRQHAPPENED(r13)

	andi.	r10,r11,PACA_IRQ_MUST_HARD_MASK

	beq	.Lfast_kernel_interrupt_return_\srr\() // No HARD_MASK pending

	bne	1f // HARD_MASK is pending

	// No HARD_MASK pending, clear possible HARD_DIS set by interrupt

	andi.	r11,r11,(~PACA_IRQ_HARD_DIS)@l

	stb	r11,PACAIRQHAPPENED(r13)

	b	.Lfast_kernel_interrupt_return_\srr\()





	/* Must clear MSR_EE from _MSR */

1:	/* Must clear MSR_EE from _MSR */

#ifdef CONFIG_PPC_BOOK3S

	li	r10,0

	/* Clear valid before changing _MSR */