Commit 912a0bf5 authored by Alex Deucher's avatar Alex Deucher
Browse files

drm/amdgpu/powerplay: split out common smu7 BACO code 



Several of the BACO functions are common across smu7-based
asics.  Split the common code out.

Reviewed-by: default avatarEvan Quan <evan.quan@amd.com>
Acked-by: default avatarChristian König <christian.koenig@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 56f68f18

drivers/gpu/drm/amd/powerplay/hwmgr/Makefile

+1 −1
Original line number Diff line number Diff line
@@ -37,7 +37,7 @@ HARDWARE_MGR = hwmgr.o processpptables.o \ 
		vega20_processpptables.o vega20_hwmgr.o vega20_powertune.o \

		vega20_thermal.o common_baco.o vega10_baco.o  vega20_baco.o \

		vega12_baco.o smu9_baco.o tonga_baco.o polaris_baco.o fiji_baco.o \

		ci_baco.o

		ci_baco.o smu7_baco.o



AMD_PP_HWMGR = $(addprefix $(AMD_PP_PATH)/hwmgr/,$(HARDWARE_MGR))

drivers/gpu/drm/amd/powerplay/hwmgr/ci_baco.c

+1 −33
Original line number Diff line number Diff line
@@ -158,43 +158,11 @@ static const struct baco_cmd_entry clean_baco_tbl[] = 
	{ CMD_WRITE, mmCP_PFP_UCODE_ADDR, 0, 0, 0, 0 }

};



int ci_baco_get_capability(struct pp_hwmgr *hwmgr, bool *cap)

{

	struct amdgpu_device *adev = (struct amdgpu_device *)(hwmgr->adev);

	uint32_t reg;



	*cap = false;

	if (!phm_cap_enabled(hwmgr->platform_descriptor.platformCaps, PHM_PlatformCaps_BACO))

		return 0;



	reg = RREG32(mmCC_BIF_BX_FUSESTRAP0);



	if (reg & CC_BIF_BX_FUSESTRAP0__STRAP_BIF_PX_CAPABLE_MASK)

		*cap = true;



	return 0;

}



int ci_baco_get_state(struct pp_hwmgr *hwmgr, enum BACO_STATE *state)

{

	struct amdgpu_device *adev = (struct amdgpu_device *)(hwmgr->adev);

	uint32_t reg;



	reg = RREG32(mmBACO_CNTL);



	if (reg & BACO_CNTL__BACO_MODE_MASK)

		/* gfx has already entered BACO state */

		*state = BACO_STATE_IN;

	else

		*state = BACO_STATE_OUT;

	return 0;

}



int ci_baco_set_state(struct pp_hwmgr *hwmgr, enum BACO_STATE state)

{

	enum BACO_STATE cur_state;



	ci_baco_get_state(hwmgr, &cur_state);

	smu7_baco_get_state(hwmgr, &cur_state);



	if (cur_state == state)

		/* aisc already in the target state */

drivers/gpu/drm/amd/powerplay/hwmgr/ci_baco.h

+1 −4
Original line number Diff line number Diff line
@@ -22,11 +22,8 @@ 
 */

#ifndef __CI_BACO_H__

#define __CI_BACO_H__

#include "hwmgr.h"

#include "common_baco.h"

#include "smu7_baco.h"



extern int ci_baco_get_capability(struct pp_hwmgr *hwmgr, bool *cap);

extern int ci_baco_get_state(struct pp_hwmgr *hwmgr, enum BACO_STATE *state);

extern int ci_baco_set_state(struct pp_hwmgr *hwmgr, enum BACO_STATE state);



#endif

drivers/gpu/drm/amd/powerplay/hwmgr/fiji_baco.c

+1 −33
Original line number Diff line number Diff line
@@ -158,43 +158,11 @@ static const struct baco_cmd_entry clean_baco_tbl[] = 
	{ CMD_WRITE, mmBIOS_SCRATCH_15, 0, 0, 0, 0 }

};



int fiji_baco_get_capability(struct pp_hwmgr *hwmgr, bool *cap)

{

	struct amdgpu_device *adev = (struct amdgpu_device *)(hwmgr->adev);

	uint32_t reg;



	*cap = false;

	if (!phm_cap_enabled(hwmgr->platform_descriptor.platformCaps, PHM_PlatformCaps_BACO))

		return 0;



	reg = RREG32(mmCC_BIF_BX_FUSESTRAP0);



	if (reg & CC_BIF_BX_FUSESTRAP0__STRAP_BIF_PX_CAPABLE_MASK)

		*cap = true;



	return 0;

}



int fiji_baco_get_state(struct pp_hwmgr *hwmgr, enum BACO_STATE *state)

{

	struct amdgpu_device *adev = (struct amdgpu_device *)(hwmgr->adev);

	uint32_t reg;



	reg = RREG32(mmBACO_CNTL);



	if (reg & BACO_CNTL__BACO_MODE_MASK)

		/* gfx has already entered BACO state */

		*state = BACO_STATE_IN;

	else

		*state = BACO_STATE_OUT;

	return 0;

}



int fiji_baco_set_state(struct pp_hwmgr *hwmgr, enum BACO_STATE state)

{

	enum BACO_STATE cur_state;



	fiji_baco_get_state(hwmgr, &cur_state);

	smu7_baco_get_state(hwmgr, &cur_state);



	if (cur_state == state)

		/* aisc already in the target state */

drivers/gpu/drm/amd/powerplay/hwmgr/fiji_baco.h

+1 −4
Original line number Diff line number Diff line
@@ -22,11 +22,8 @@ 
 */

#ifndef __FIJI_BACO_H__

#define __FIJI_BACO_H__

#include "hwmgr.h"

#include "common_baco.h"

#include "smu7_baco.h"



extern int fiji_baco_get_capability(struct pp_hwmgr *hwmgr, bool *cap);

extern int fiji_baco_get_state(struct pp_hwmgr *hwmgr, enum BACO_STATE *state);

extern int fiji_baco_set_state(struct pp_hwmgr *hwmgr, enum BACO_STATE state);



#endif