Commit 91204e47 authored by Dani Liberman's avatar Dani Liberman Committed by Oded Gabbay
Browse files

accel/habanalabs: fix handling of arc farm sei event 



There is only single eq entry for arc farm sei event which aggregates
events from the four arc farms.
Fix the code to handle this event according to this behavior.

Signed-off-by: default avatarDani Liberman <dliberman@habana.ai>
Reviewed-by: default avatarOded Gabbay <ogabbay@kernel.org>
Signed-off-by: default avatarOded Gabbay <ogabbay@kernel.org>
parent b207e166

drivers/accel/habanalabs/gaudi2/gaudi2.c

+15 −10
Original line number Diff line number Diff line
@@ -8490,23 +8490,28 @@ static int gaudi2_handle_qman_err(struct hl_device *hdev, u16 event_type, u64 *e 


static int gaudi2_handle_arc_farm_sei_err(struct hl_device *hdev, u16 event_type)

{

	u32 i, sts_val, sts_clr_val = 0, error_count = 0;

	u32 i, sts_val, sts_clr_val, error_count = 0, arc_farm;



	sts_val = RREG32(mmARC_FARM_ARC0_AUX_ARC_SEI_INTR_STS);

	for (arc_farm = 0 ; arc_farm < NUM_OF_ARC_FARMS_ARC ; arc_farm++) {

		sts_clr_val = 0;

		sts_val = RREG32(mmARC_FARM_ARC0_AUX_ARC_SEI_INTR_STS +

				(arc_farm * ARC_FARM_OFFSET));



		for (i = 0 ; i < GAUDI2_NUM_OF_ARC_SEI_ERR_CAUSE ; i++) {

			if (sts_val & BIT(i)) {

				gaudi2_print_event(hdev, event_type, true,

				"err cause: %s", gaudi2_arc_sei_error_cause[i]);

						"ARC FARM ARC %u err cause: %s",

						arc_farm, gaudi2_arc_sei_error_cause[i]);

				sts_clr_val |= BIT(i);

				error_count++;

			}

		}

		WREG32(mmARC_FARM_ARC0_AUX_ARC_SEI_INTR_CLR + (arc_farm * ARC_FARM_OFFSET),

				sts_clr_val);

	}



	hl_check_for_glbl_errors(hdev);



	WREG32(mmARC_FARM_ARC0_AUX_ARC_SEI_INTR_CLR, sts_clr_val);



	return error_count;

}

drivers/accel/habanalabs/include/gaudi2/asic_reg/gaudi2_regs.h

+3 −1
Original line number Diff line number Diff line 
/* SPDX-License-Identifier: GPL-2.0

 *

 * Copyright 2020-2022 HabanaLabs, Ltd.

 * Copyright 2020-2023 HabanaLabs, Ltd.

 * All Rights Reserved.

 *

 */
@@ -543,6 +543,8 @@ 
#define HBM_MC_SPI_IEEE1500_COMP_MASK		BIT(3)

#define HBM_MC_SPI_IEEE1500_PAUSED_MASK		BIT(4)



#define ARC_FARM_OFFSET (mmARC_FARM_ARC1_AUX_BASE - mmARC_FARM_ARC0_AUX_BASE)



#include "nic0_qpc0_regs.h"

#include "nic0_qm0_regs.h"

#include "nic0_qm_arc_aux0_regs.h"