Commit 90deec51 authored Apr 01, 2023 by Anup Patel Committed by Anup Patel Apr 21, 2023

RISC-V: KVM: Allow Zbb extension for Guest/VM



We extend the KVM ISA extension ONE_REG interface to allow KVM
user space to detect and enable Zbb extension for Guest/VM.

Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-by: Atish Patra <atishp@rivosinc.com>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Signed-off-by: Anup Patel <anup@brainfault.org>

parent 96b3d4bd

arch/riscv/include/uapi/asm/kvm.h

+1 −0

Original line number	Diff line number	Diff line
		@@ -106,6 +106,7 @@ enum KVM_RISCV_ISA_EXT_ID {
		KVM_RISCV_ISA_EXT_SVINVAL,
		KVM_RISCV_ISA_EXT_ZIHINTPAUSE,
		KVM_RISCV_ISA_EXT_ZICBOM,
		KVM_RISCV_ISA_EXT_ZBB,
		KVM_RISCV_ISA_EXT_MAX,
		};

arch/riscv/kvm/vcpu.c

+2 −0

Original line number	Diff line number	Diff line
		@@ -61,6 +61,7 @@ static const unsigned long kvm_isa_ext_arr[] = {
		KVM_ISA_EXT_ARR(SSTC),
		KVM_ISA_EXT_ARR(SVINVAL),
		KVM_ISA_EXT_ARR(SVPBMT),
		KVM_ISA_EXT_ARR(ZBB),
		KVM_ISA_EXT_ARR(ZIHINTPAUSE),
		KVM_ISA_EXT_ARR(ZICBOM),
		};
		@@ -99,6 +100,7 @@ static bool kvm_riscv_vcpu_isa_disable_allowed(unsigned long ext)
		case KVM_RISCV_ISA_EXT_SSTC:
		case KVM_RISCV_ISA_EXT_SVINVAL:
		case KVM_RISCV_ISA_EXT_ZIHINTPAUSE:
		case KVM_RISCV_ISA_EXT_ZBB:
		return false;
		default:
		break;