Commit 90ddb3f0 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'pci-v6.3-changes' of git://git.kernel.org/pub/scm/linux/kernel/git/pci/pci 

Pull PCI updates from Bjorn Helgaas:
 "Enumeration:

   - Rework portdrv shutdown so it disables interrupts but doesn't
     disable bus mastering, which leads to hangs on Loongson LS7A

   - Add mechanism to prevent Max_Read_Request_Size (MRRS) increases,
     again to avoid hardware issues on Loongson LS7A (and likely other
     devices based on DesignWare IP)

   - Ignore devices with a firmware (DT or ACPI) node that says the
     device is disabled

  Resource management:

   - Distribute spare resources to unconfigured hotplug bridges at
     boot-time (not just when hot-adding such a bridge), which makes
     hot-adding devices to docks work better. Tried this in v6.1 but had
     to revert for regressions, so try again

   - Fix root bus issue that dropped resources that happened to end
     at 0, e.g., [bus 00]

  PCI device hotplug:

   - Remove device locking when marking device as disconnected so this
     doesn't have to wait for concurrent driver bind/unbind to complete

   - Quirk more Qualcomm bridges that don't fully implement the PCIe
     Slot Status 'Command Completed' bit

  Power management:

   - Account for _S0W of the target bridge in acpi_pci_bridge_d3() so we
     don't miss hot-add notifications for USB4 docks, Thunderbolt, etc

  Reset:

   - Observe delay after reset, e.g., resuming from system sleep,
     regardless of whether a bridge can suspend to D3cold at runtime

   - Wait for secondary bus to become ready after a bridge reset

  Virtualization:

   - Avoid FLR on some AMD FCH AHCI adapters where it doesn't work

   - Allow independent IOMMU groups for some Wangxun NICs that prevent
     peer-to-peer transactions but don't advertise an ACS Capability

  Error handling:

   - Configure End-to-End-CRC (ECRC) only if Linux owns the AER
     Capability

   - Remove redundant Device Control Error Reporting Enable in the AER
     service driver since this is already done for all devices during
     enumeration

  ASPM:

   - Add pci_enable_link_state() interface to allow drivers to enable
     ASPM link state

  Endpoint framework:

   - Move dra7xx and tegra194 linkup processing from hard IRQ to
     threaded IRQ handler

   - Add a separate lock for endpoint controller list of endpoint
     function drivers to prevent deadlock in callbacks

   - Pass events from endpoint controller to endpoint function drivers
     via callbacks instead of notifiers

  Synopsys DesignWare eDMA controller driver (acked by Vinod):

   - Fix CPU vs PCI address issues

   - Fix source vs destination address issues

   - Fix issues with interleaved transfer semantics

   - Fix channel count initialization issue (issue still exists in
     several other drivers)

   - Clean up and improve debugfs usage so it will work on platforms
     with several eDMA devices

  Baikal T-1 PCIe controller driver:

   - Set a 64-bit DMA mask

  Freescale i.MX6 PCIe controller driver:

   - Add i.MX8MM, i.MX8MQ, i.MX8MP endpoint mode DT binding and driver
     support

  Intel VMD host bridge driver:

   - Add quirk to configure PCIe ASPM and LTR. This is normally done by
     BIOS, and will be for future products

  Marvell MVEBU PCIe controller driver:

   - Mark this driver as broken in Kconfig since bugs prevent its daily
     usage

  MediaTek MT7621 PCIe controller driver:

   - Delay PHY port initialization to improve boot reliability for ZBT
     WE1326, ZBT WF3526-P, and some Netgear models

  Qualcomm PCIe controller driver:

   - Add MSM8998 DT compatible string

   - Unify MSM8996 and MSM8998 clock orderings

   - Add SM8350 DT binding and driver support

   - Add IPQ8074 Gen3 DT binding and driver support

   - Correct qcom,perst-regs in DT binding

   - Add qcom_pcie_host_deinit() so the PHY is powered off and
     regulators and clocks are disabled on late host-init errors

  Socionext UniPhier Pro5 controller driver:

   - Clean up uniphier-ep reg, clocks, resets, and their names in DT
     binding

  Synopsys DesignWare PCIe controller driver:

   - Restrict coherent DMA mask to 32 bits for MSI, but allow controller
     drivers to set 64-bit streaming DMA mask

   - Add eDMA engine support in both Root Port and Endpoint controllers

  Miscellaneous:

   - Remove MODULE_LICENSE from boolean drivers so they don't look like
     modules so modprobe can complain about them"

* tag 'pci-v6.3-changes' of git://git.kernel.org/pub/scm/linux/kernel/git/pci/pci: (86 commits)
  PCI: dwc: Add Root Port and Endpoint controller eDMA engine support
  PCI: bt1: Set 64-bit DMA mask
  PCI: dwc: Restrict only coherent DMA mask for MSI address allocation
  dmaengine: dw-edma: Prepare dw_edma_probe() for builtin callers
  dmaengine: dw-edma: Depend on DW_EDMA instead of selecting it
  dmaengine: dw-edma: Add mem-mapped LL-entries support
  PCI: Remove MODULE_LICENSE so boolean drivers don't look like modules
  PCI: hv: Drop duplicate PCI_MSI dependency
  PCI/P2PDMA: Annotate RCU dereference
  PCI/sysfs: Constify struct kobj_type pci_slot_ktype
  PCI: hotplug: Allow marking devices as disconnected during bind/unbind
  PCI: pciehp: Add Qualcomm quirk for Command Completed erratum
  PCI: qcom: Add IPQ8074 Gen3 port support
  dt-bindings: PCI: qcom: Add IPQ8074 Gen3 port
  dt-bindings: PCI: qcom: Sort compatibles alphabetically
  PCI: qcom: Fix host-init error handling
  PCI: qcom: Add SM8350 support
  dt-bindings: PCI: qcom: Add SM8350
  dt-bindings: PCI: qcom-ep: Correct qcom,perst-regs
  dt-bindings: PCI: qcom: Unify MSM8996 and MSM8998 clock order
  ...
parents 8cbd9233 3eb5d0f2

Documentation/admin-guide/kernel-parameters.txt

+3 −1
Original line number Diff line number Diff line
@@ -4303,7 +4303,9 @@ 
				specified, e.g., 12@pci:8086:9c22:103c:198f

				for 4096-byte alignment.

		ecrc=		Enable/disable PCIe ECRC (transaction layer

				end-to-end CRC checking).

				end-to-end CRC checking). Only effective if

				OS has native AER control (either granted by

				ACPI _OSC or forced via "pcie_ports=native")

				bios: Use BIOS/firmware settings. This is the

				the default.

				off: Turn ECRC off

Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml

+3 −0
Original line number Diff line number Diff line
@@ -24,6 +24,9 @@ properties: 
      - fsl,imx8mq-pcie

      - fsl,imx8mm-pcie

      - fsl,imx8mp-pcie

      - fsl,imx8mm-pcie-ep

      - fsl,imx8mq-pcie-ep

      - fsl,imx8mp-pcie-ep



  reg:

    items:

Documentation/devicetree/bindings/pci/qcom,pcie-ep.yaml

+4 −2
Original line number Diff line number Diff line
@@ -47,8 +47,10 @@ properties: 
                 enable registers

    $ref: "/schemas/types.yaml#/definitions/phandle-array"

    items:

      minItems: 3

      maxItems: 3

      - items:

          - description: Syscon to TCSR system registers

          - description: Perst enable offset

          - description: Perst separation enable offset



  interrupts:

    items:

Documentation/devicetree/bindings/pci/qcom,pcie.yaml

+67 −36
Original line number Diff line number Diff line
@@ -16,14 +16,17 @@ description: | 


properties:

  compatible:

    enum:

      - qcom,pcie-ipq8064

      - qcom,pcie-ipq8064-v2

    oneOf:

      - enum:

          - qcom,pcie-apq8064

          - qcom,pcie-apq8084

      - qcom,pcie-msm8996

          - qcom,pcie-ipq4019

          - qcom,pcie-ipq6018

          - qcom,pcie-ipq8064

          - qcom,pcie-ipq8064-v2

          - qcom,pcie-ipq8074

          - qcom,pcie-ipq8074-gen3

          - qcom,pcie-msm8996

          - qcom,pcie-qcs404

          - qcom,pcie-sa8540p

          - qcom,pcie-sc7280
@@ -32,9 +35,12 @@ properties: 
          - qcom,pcie-sdm845

          - qcom,pcie-sm8150

          - qcom,pcie-sm8250

          - qcom,pcie-sm8350

          - qcom,pcie-sm8450-pcie0

          - qcom,pcie-sm8450-pcie1

      - qcom,pcie-ipq6018

      - items:

          - const: qcom,pcie-msm8998

          - const: qcom,pcie-msm8996



  reg:

    minItems: 4
@@ -153,6 +159,7 @@ allOf: 
          contains:

            enum:

              - qcom,pcie-ipq6018

              - qcom,pcie-ipq8074-gen3

    then:

      properties:

        reg:
@@ -195,6 +202,7 @@ allOf: 
              - qcom,pcie-sc8180x

              - qcom,pcie-sc8280xp

              - qcom,pcie-sm8250

              - qcom,pcie-sm8350

              - qcom,pcie-sm8450-pcie0

              - qcom,pcie-sm8450-pcie1

    then:
@@ -312,8 +320,10 @@ allOf: 
            enum:

              - qcom,pcie-msm8996

    then:

      oneOf:

        - properties:

      properties:

        clocks:

          minItems: 5

          maxItems: 5

        clock-names:

          items:

            - const: pipe # Pipe Clock driving internal logic
@@ -321,18 +331,6 @@ allOf: 
            - const: cfg # Configuration clock

            - const: bus_master # Master AXI clock

            - const: bus_slave # Slave AXI clock

        - properties:

            clock-names:

              items:

                - const: pipe # Pipe Clock driving internal logic

                - const: bus_master # Master AXI clock

                - const: bus_slave # Slave AXI clock

                - const: cfg # Configuration clock

                - const: aux # Auxiliary (AUX) clock

      properties:

        clocks:

          minItems: 5

          maxItems: 5

        resets: false

        reset-names: false
@@ -373,6 +371,7 @@ allOf: 
          contains:

            enum:

              - qcom,pcie-ipq6018

              - qcom,pcie-ipq8074-gen3

    then:

      properties:

        clocks:
@@ -550,6 +549,35 @@ allOf: 
          items:

            - const: pci # PCIe core reset



  - if:

      properties:

        compatible:

          contains:

            enum:

              - qcom,pcie-sm8350

    then:

      properties:

        clocks:

          minItems: 8

          maxItems: 9

        clock-names:

          minItems: 8

          items:

            - const: aux # Auxiliary clock

            - const: cfg # Configuration clock

            - const: bus_master # Master AXI clock

            - const: bus_slave # Slave AXI clock

            - const: slave_q2a # Slave Q2A clock

            - const: tbu # PCIe TBU clock

            - const: ddrss_sf_tbu # PCIe SF TBU clock

            - const: aggre1 # Aggre NoC PCIe1 AXI clock

            - const: aggre0 # Aggre NoC PCIe0 AXI clock

        resets:

          maxItems: 1

        reset-names:

          items:

            - const: pci # PCIe core reset



  - if:

      properties:

        compatible:
@@ -664,6 +692,7 @@ allOf: 
                - qcom,pcie-ipq8064

                - qcom,pcie-ipq8064v2

                - qcom,pcie-ipq8074

                - qcom,pcie-ipq8074-gen3

                - qcom,pcie-qcs404

    then:

      required:
@@ -692,6 +721,7 @@ allOf: 
              - qcom,pcie-sdm845

              - qcom,pcie-sm8150

              - qcom,pcie-sm8250

              - qcom,pcie-sm8350

              - qcom,pcie-sm8450-pcie0

              - qcom,pcie-sm8450-pcie1

    then:
@@ -746,6 +776,7 @@ allOf: 
              - qcom,pcie-ipq8064

              - qcom,pcie-ipq8064-v2

              - qcom,pcie-ipq8074

              - qcom,pcie-ipq8074-gen3

              - qcom,pcie-qcs404

              - qcom,pcie-sa8540p

    then:

Documentation/devicetree/bindings/pci/socionext,uniphier-pcie-ep.yaml

+49 −27
Original line number Diff line number Diff line
@@ -15,9 +15,6 @@ description: | 
maintainers:

  - Kunihiko Hayashi <hayashi.kunihiko@socionext.com>



allOf:

  - $ref: /schemas/pci/snps,dw-pcie-ep.yaml#



properties:

  compatible:

    enum:
@@ -29,13 +26,8 @@ properties: 
    maxItems: 5



  reg-names:

    oneOf:

      - items:

          - const: dbi

          - const: dbi2

          - const: link

          - const: addr_space

      - items:

    minItems: 4

    items:

      - const: dbi

      - const: dbi2

      - const: link
@@ -46,23 +38,13 @@ properties: 
    minItems: 1

    maxItems: 2



  clock-names:

    oneOf:

      - items:              # for Pro5

          - const: gio

          - const: link

      - const: link         # for NX1

  clock-names: true



  resets:

    minItems: 1

    maxItems: 2



  reset-names:

    oneOf:

      - items:              # for Pro5

          - const: gio

          - const: link

      - const: link         # for NX1

  reset-names: true



  num-ib-windows:

    const: 16
@@ -78,6 +60,46 @@ properties: 
  phy-names:

    const: pcie-phy



allOf:

  - $ref: /schemas/pci/snps,dw-pcie-ep.yaml#

  - if:

      properties:

        compatible:

          contains:

            const: socionext,uniphier-pro5-pcie-ep

    then:

      properties:

        reg:

          maxItems: 4

        reg-names:

          maxItems: 4

        clocks:

          minItems: 2

        clock-names:

          items:

            - const: gio

            - const: link

        resets:

          minItems: 2

        reset-names:

          items:

            - const: gio

            - const: link

    else:

      properties:

        reg:

          minItems: 5

        reg-names:

          minItems: 5

        clocks:

          maxItems: 1

        clock-names:

          const: link

        resets:

          maxItems: 1

        reset-names:

          const: link



required:

  - compatible

  - reg