Commit 90cf8e21 authored by Jiucheng Xu's avatar Jiucheng Xu Committed by Neil Armstrong
Browse files

arm64: dts: meson: Add DDR PMU node 



Add DDR PMU device node for G12 series SoC

Signed-off-by: default avatarJiucheng Xu <jiucheng.xu@amlogic.com>
Reviewed-by: default avatarNeil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20221109015818.194927-4-jiucheng.xu@amlogic.com


Signed-off-by: default avatarNeil Armstrong <neil.armstrong@linaro.org>
parent 49f65e2e

arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi

+6 −0
Original line number Diff line number Diff line
@@ -1705,6 +1705,12 @@ 
			};

		};



		pmu: pmu@ff638000 {

			reg = <0x0 0xff638000 0x0 0x100>,

			      <0x0 0xff638c00 0x0 0x100>;

			interrupts = <GIC_SPI 52 IRQ_TYPE_EDGE_RISING>;

		};



		aobus: bus@ff800000 {

			compatible = "simple-bus";

			reg = <0x0 0xff800000 0x0 0x100000>;

arch/arm64/boot/dts/amlogic/meson-g12a.dtsi

+4 −0
Original line number Diff line number Diff line
@@ -134,3 +134,7 @@ 
		};

	};

};



&pmu {

	compatible = "amlogic,g12a-ddr-pmu";

};

arch/arm64/boot/dts/amlogic/meson-g12b.dtsi

+4 −0
Original line number Diff line number Diff line
@@ -140,3 +140,7 @@ 
&mali {

	dma-coherent;

};



&pmu {

	compatible = "amlogic,g12b-ddr-pmu";

};

arch/arm64/boot/dts/amlogic/meson-sm1.dtsi

+4 −0
Original line number Diff line number Diff line
@@ -521,6 +521,10 @@ 
	power-domains = <&pwrc PWRC_SM1_PCIE_ID>;

};



&pmu {

	compatible = "amlogic,sm1-ddr-pmu";

};



&pwrc {

	compatible = "amlogic,meson-sm1-pwrc";

};