Commit 90ccf0a0 authored by Miquel Raynal's avatar Miquel Raynal
Browse files

mtd: nand: ecc-hamming: Rename the exported functions



Prefix by ecc_sw_hamming_ the functions which should be internal only
but are exported for "raw" operations.

Prefix by nand_ecc_sw_hamming_ the other functions which will be used
in the context of the declaration of an Hamming proper ECC engine
object.

Signed-off-by: default avatarMiquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/20200929230124.31491-16-miquel.raynal@bootlin.com
parent b551fa30
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+28 −25
Original line number Diff line number Diff line
@@ -75,7 +75,7 @@ static const char bitsperbyte[256] = {
 * addressbits is a lookup table to filter out the bits from the xor-ed
 * ECC data that identify the faulty location.
 * this is only used for repairing parity
 * see the comments in nand_correct_data for more details
 * see the comments in nand_ecc_sw_hamming_correct for more details
 */
static const char addressbits[256] = {
	0x00, 0x00, 0x01, 0x01, 0x00, 0x00, 0x01, 0x01,
@@ -112,11 +112,11 @@ static const char addressbits[256] = {
	0x0e, 0x0e, 0x0f, 0x0f, 0x0e, 0x0e, 0x0f, 0x0f
};

void __nand_calculate_ecc(const unsigned char *buf, unsigned int eccsize,
int ecc_sw_hamming_calculate(const unsigned char *buf, unsigned int step_size,
			     unsigned char *code, bool sm_order)
{
	const u32 *bp = (uint32_t *)buf;
	const u32 eccsize_mult = eccsize >> 8;
	const u32 eccsize_mult = step_size >> 8;
	/* current value in buffer */
	u32 cur;
	/* rp0..rp17 are the various accumulated parities (per byte) */
@@ -347,31 +347,32 @@ void __nand_calculate_ecc(const unsigned char *buf, unsigned int eccsize,
		    (invparity[par & 0x55] << 2) |
		    (invparity[rp17] << 1) |
		    (invparity[rp16] << 0);

	return 0;
}
EXPORT_SYMBOL(__nand_calculate_ecc);
EXPORT_SYMBOL(ecc_sw_hamming_calculate);

/**
 * nand_calculate_ecc - Calculate 3-byte ECC for 256/512-byte block
 * @chip: NAND chip object
 * nand_ecc_sw_hamming_calculate - Calculate 3-byte ECC for 256/512-byte block
 * @nand: NAND device
 * @buf: Input buffer with raw data
 * @code: Output buffer with ECC
 */
int nand_calculate_ecc(struct nand_chip *chip, const unsigned char *buf,
		       unsigned char *code)
int nand_ecc_sw_hamming_calculate(struct nand_device *nand,
				  const unsigned char *buf, unsigned char *code)
{
	struct nand_chip *chip = mtd_to_nand(nanddev_to_mtd(nand));
	bool sm_order = chip->ecc.options & NAND_ECC_SOFT_HAMMING_SM_ORDER;

	__nand_calculate_ecc(buf, chip->ecc.size, code, sm_order);

	return 0;
	return ecc_sw_hamming_calculate(buf, chip->ecc.size, code, sm_order);
}
EXPORT_SYMBOL(nand_calculate_ecc);
EXPORT_SYMBOL(nand_ecc_sw_hamming_calculate);

int __nand_correct_data(unsigned char *buf,
			unsigned char *read_ecc, unsigned char *calc_ecc,
			unsigned int eccsize, bool sm_order)
int ecc_sw_hamming_correct(unsigned char *buf, unsigned char *read_ecc,
			   unsigned char *calc_ecc, unsigned int step_size,
			   bool sm_order)
{
	const u32 eccsize_mult = eccsize >> 8;
	const u32 eccsize_mult = step_size >> 8;
	unsigned char b0, b1, b2, bit_addr;
	unsigned int byte_addr;

@@ -437,26 +438,28 @@ int __nand_correct_data(unsigned char *buf,
	pr_err("%s: uncorrectable ECC error\n", __func__);
	return -EBADMSG;
}
EXPORT_SYMBOL(__nand_correct_data);
EXPORT_SYMBOL(ecc_sw_hamming_correct);

/**
 * nand_correct_data - Detect and correct bit error(s)
 * @chip: NAND chip object
 * nand_ecc_sw_hamming_correct - Detect and correct bit error(s)
 * @nand: NAND device
 * @buf: Raw data read from the chip
 * @read_ecc: ECC bytes read from the chip
 * @calc_ecc: ECC calculated from the raw data
 *
 * Detect and correct up to 1 bit error per 256/512-byte block.
 */
int nand_correct_data(struct nand_chip *chip, unsigned char *buf,
		      unsigned char *read_ecc, unsigned char *calc_ecc)
int nand_ecc_sw_hamming_correct(struct nand_device *nand, unsigned char *buf,
				unsigned char *read_ecc,
				unsigned char *calc_ecc)
{
	struct nand_chip *chip = mtd_to_nand(nanddev_to_mtd(nand));
	bool sm_order = chip->ecc.options & NAND_ECC_SOFT_HAMMING_SM_ORDER;

	return __nand_correct_data(buf, read_ecc, calc_ecc, chip->ecc.size,
	return ecc_sw_hamming_correct(buf, read_ecc, calc_ecc, chip->ecc.size,
				      sm_order);
}
EXPORT_SYMBOL(nand_correct_data);
EXPORT_SYMBOL(nand_ecc_sw_hamming_correct);

MODULE_LICENSE("GPL");
MODULE_AUTHOR("Frans Meulenbroeks <fransmeulenbroeks@gmail.com>");
+1 −2
Original line number Diff line number Diff line
@@ -19,7 +19,6 @@
#include <linux/delay.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/rawnand.h>
#include <linux/mtd/nand-ecc-sw-hamming.h>
#include <linux/mtd/partitions.h>
#include <linux/iopoll.h>

@@ -252,7 +251,7 @@ static int cs553x_attach_chip(struct nand_chip *chip)
	chip->ecc.bytes = 3;
	chip->ecc.hwctl  = cs_enable_hwecc;
	chip->ecc.calculate = cs_calculate_ecc;
	chip->ecc.correct  = nand_correct_data;
	chip->ecc.correct  = rawnand_sw_hamming_correct;
	chip->ecc.strength = 1;

	return 0;
+1 −1
Original line number Diff line number Diff line
@@ -918,7 +918,7 @@ static int fsmc_nand_attach_chip(struct nand_chip *nand)
	case NAND_ECC_ENGINE_TYPE_ON_HOST:
		dev_info(host->dev, "Using 1-bit HW ECC scheme\n");
		nand->ecc.calculate = fsmc_read_hwecc_ecc1;
		nand->ecc.correct = nand_correct_data;
		nand->ecc.correct = rawnand_sw_hamming_correct;
		nand->ecc.hwctl = fsmc_enable_hwecc;
		nand->ecc.bytes = 3;
		nand->ecc.strength = 1;
+1 −1
Original line number Diff line number Diff line
@@ -803,7 +803,7 @@ static int lpc32xx_nand_attach_chip(struct nand_chip *chip)
	chip->ecc.write_oob = lpc32xx_nand_write_oob_syndrome;
	chip->ecc.read_oob = lpc32xx_nand_read_oob_syndrome;
	chip->ecc.calculate = lpc32xx_nand_ecc_calculate;
	chip->ecc.correct = nand_correct_data;
	chip->ecc.correct = rawnand_sw_hamming_correct;
	chip->ecc.hwctl = lpc32xx_nand_ecc_enable;

	/*
+23 −2
Original line number Diff line number Diff line
@@ -5139,6 +5139,27 @@ static void nand_scan_ident_cleanup(struct nand_chip *chip)
	kfree(chip->parameters.onfi);
}

int rawnand_sw_hamming_calculate(struct nand_chip *chip,
				 const unsigned char *buf,
				 unsigned char *code)
{
	struct nand_device *base = &chip->base;

	return nand_ecc_sw_hamming_calculate(base, buf, code);
}
EXPORT_SYMBOL(rawnand_sw_hamming_calculate);

int rawnand_sw_hamming_correct(struct nand_chip *chip,
			       unsigned char *buf,
			       unsigned char *read_ecc,
			       unsigned char *calc_ecc)
{
	struct nand_device *base = &chip->base;

	return nand_ecc_sw_hamming_correct(base, buf, read_ecc, calc_ecc);
}
EXPORT_SYMBOL(rawnand_sw_hamming_correct);

int rawnand_sw_bch_init(struct nand_chip *chip)
{
	struct nand_device *base = &chip->base;
@@ -5263,8 +5284,8 @@ static int nand_set_ecc_soft_ops(struct nand_chip *chip)

	switch (ecc->algo) {
	case NAND_ECC_ALGO_HAMMING:
		ecc->calculate = nand_calculate_ecc;
		ecc->correct = nand_correct_data;
		ecc->calculate = rawnand_sw_hamming_calculate;
		ecc->correct = rawnand_sw_hamming_correct;
		ecc->read_page = nand_read_page_swecc;
		ecc->read_subpage = nand_read_subpage;
		ecc->write_page = nand_write_page_swecc;
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