Commit 90c8c4eb authored by Komal Bajaj's avatar Komal Bajaj Committed by Bjorn Andersson
Browse files

arm64: dts: qcom: qdu1000: Add SDHCI node 



Add sdhc node for eMMC on QDU1000 and QRU1000 SoCs. Also add
required pins for SDHCI, so that the interface can work reliably.

Reviewed-by: default avatarKonrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: default avatarKomal Bajaj <quic_kbajaj@quicinc.com>
Signed-off-by: default avatarBjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230601111128.19562-3-quic_kbajaj@quicinc.com
parent b5b0649d

arch/arm64/boot/dts/qcom/qdu1000.dtsi

+97 −0
Original line number Diff line number Diff line
@@ -842,6 +842,53 @@ 
			#hwlock-cells = <1>;

		};



		sdhc: mmc@8804000 {

			compatible = "qcom,qdu1000-sdhci", "qcom,sdhci-msm-v5";

			reg = <0x0 0x08804000 0x0 0x1000>,

			      <0x0 0x08805000 0x0 0x1000>;

			reg-names = "hc", "cqhci";



			interrupts = <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>;

			interrupt-names = "hc_irq", "pwr_irq";



			clocks = <&gcc GCC_SDCC5_AHB_CLK>,

				 <&gcc GCC_SDCC5_APPS_CLK>,

				 <&rpmhcc RPMH_CXO_CLK>;

			clock-names = "iface",

				      "core",

				      "xo";



			resets = <&gcc GCC_SDCC5_BCR>;



			interconnects = <&system_noc MASTER_SDCC_1 0 &mc_virt SLAVE_EBI1 0>,

					<&gem_noc MASTER_APPSS_PROC 0 &system_noc SLAVE_SDCC_2 0>;

			interconnect-names = "sdhc-ddr", "cpu-sdhc";

			power-domains = <&rpmhpd QDU1000_CX>;

			operating-points-v2 = <&sdhc1_opp_table>;



			iommus = <&apps_smmu 0x80 0x0>;

			dma-coherent;



			bus-width = <8>;



			qcom,dll-config = <0x0007642c>;

			qcom,ddr-config = <0x80040868>;



			status = "disabled";



			sdhc1_opp_table: opp-table {

				compatible = "operating-points-v2";



				opp-384000000 {

					opp-hz = /bits/ 64 <384000000>;

					required-opps = <&rpmhpd_opp_nom>;

					opp-peak-kBps = <6528000 1652800>;

					opp-avg-kBps = <400000 0>;

				};

			};

		};



		pdc: interrupt-controller@b220000 {

			compatible = "qcom,qdu1000-pdc", "qcom,pdc";

			reg = <0x0 0xb220000 0x0 0x30000>, <0x0 0x174000f0 0x0 0x64>;
@@ -1100,6 +1147,56 @@ 
				pins = "gpio31";

				function = "gpio";

			};



			sdc_on_state: sdc-on-state {

				clk-pins {

					pins = "sdc1_clk";

					drive-strength = <16>;

					bias-disable;

				};



				cmd-pins {

					pins = "sdc1_cmd";

					drive-strength = <10>;

					bias-pull-up;

				};



				data-pins {

					pins = "sdc1_data";

					drive-strength = <10>;

					bias-pull-up;

				};



				rclk-pins {

					pins = "sdc1_rclk";

					bias-pull-down;

				};

			};



			sdc_off_state: sdc-off-state {

				clk-pins {

					pins = "sdc1_clk";

					drive-strength = <2>;

					bias-disable;

				};



				cmd-pins {

					pins = "sdc1_cmd";

					drive-strength = <2>;

					bias-pull-up;

				};



				data-pins {

					pins = "sdc1_data";

					drive-strength = <2>;

					bias-pull-up;

				};



				rclk-pins {

					pins = "sdc1_rclk";

					bias-pull-down;

				};

			};

		};



		sram@14680000 {