Commit 90a09178 authored by Thierry Reding's avatar Thierry Reding
Browse files

dt-bindings: Add documentation for GV11B GPU 



The GV11B's device tree bindings are the same as for GP10B, though the
GPU is not completely compatible, so all that is needed is a different
compatible string.

Reviewed-by: default avatarJon Hunter <jonathanh@nvidia.com>
Signed-off-by: default avatarThierry Reding <treding@nvidia.com>
parent c259dacd

Documentation/devicetree/bindings/gpu/nvidia,gk20a.txt

+25 −0
Original line number Diff line number Diff line
@@ -6,6 +6,7 @@ Required properties: 
  - nvidia,gk20a

  - nvidia,gm20b

  - nvidia,gp10b

  - nvidia,gv11b

- reg: Physical base address and length of the controller's registers.

  Must contain two entries:

  - first entry for bar0
@@ -25,6 +26,9 @@ Required properties: 
If the compatible string is "nvidia,gm20b", then the following clock

is also required:

  - ref

If the compatible string is "nvidia,gv11b", then the following clock is also

required:

  - fuse

- resets: Must contain an entry for each entry in reset-names.

  See ../reset/reset.txt for details.

- reset-names: Must include the following entries:
@@ -88,3 +92,24 @@ Example for GP10B: 
		power-domains = <&bpmp TEGRA186_POWER_DOMAIN_GPU>;

		iommus = <&smmu TEGRA186_SID_GPU>;

	};



Example for GV11B:



	gpu@17000000 {

		compatible = "nvidia,gv11b";

		reg = <0x17000000 0x10000000>,

		      <0x18000000 0x10000000>;

		interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>,

			     <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;

		interrupt-names = "stall", "nonstall";

		clocks = <&bpmp TEGRA194_CLK_GPCCLK>,

			 <&bpmp TEGRA194_CLK_GPU_PWR>,

			 <&bpmp TEGRA194_CLK_FUSE>;

		clock-names = "gpu", "pwr", "fuse";

		resets = <&bpmp TEGRA194_RESET_GPU>;

		reset-names = "gpu";

		dma-coherent;



		power-domains = <&bpmp TEGRA194_POWER_DOMAIN_GPU>;

		iommus = <&smmu TEGRA194_SID_GPU>;

	};