Commit 90a06f13 authored by Vladimir Lypak's avatar Vladimir Lypak Committed by Rob Clark
Browse files

drm/msm/dsi: Add phy configuration for MSM8953 



Add phy configuration for 14nm dsi phy found on MSM8953 SoC. Only
difference from existing configurations are io_start addresses.

Signed-off-by: default avatarVladimir Lypak <vladimir.lypak@gmail.com>
Reviewed-by: default avatarDmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: default avatarSireesh Kodali <sireeshkodali1@gmail.com>
Link: https://lore.kernel.org/r/20210928131929.18567-3-sireeshkodali1@gmail.com


Signed-off-by: default avatarDmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: default avatarRob Clark <robdclark@chromium.org>
parent 0fdf204d

drivers/gpu/drm/msm/dsi/phy/dsi_phy.c

+2 −0
Original line number Diff line number Diff line
@@ -627,6 +627,8 @@ static const struct of_device_id dsi_phy_dt_match[] = { 
	  .data = &dsi_phy_14nm_cfgs },

	{ .compatible = "qcom,dsi-phy-14nm-660",

	  .data = &dsi_phy_14nm_660_cfgs },

	{ .compatible = "qcom,dsi-phy-14nm-8953",

	  .data = &dsi_phy_14nm_8953_cfgs },

#endif

#ifdef CONFIG_DRM_MSM_DSI_10NM_PHY

	{ .compatible = "qcom,dsi-phy-10nm",

drivers/gpu/drm/msm/dsi/phy/dsi_phy.h

+1 −0
Original line number Diff line number Diff line
@@ -48,6 +48,7 @@ extern const struct msm_dsi_phy_cfg dsi_phy_20nm_cfgs; 
extern const struct msm_dsi_phy_cfg dsi_phy_28nm_8960_cfgs;

extern const struct msm_dsi_phy_cfg dsi_phy_14nm_cfgs;

extern const struct msm_dsi_phy_cfg dsi_phy_14nm_660_cfgs;

extern const struct msm_dsi_phy_cfg dsi_phy_14nm_8953_cfgs;

extern const struct msm_dsi_phy_cfg dsi_phy_10nm_cfgs;

extern const struct msm_dsi_phy_cfg dsi_phy_10nm_8998_cfgs;

extern const struct msm_dsi_phy_cfg dsi_phy_7nm_cfgs;

drivers/gpu/drm/msm/dsi/phy/dsi_phy_14nm.c

+21 −0
Original line number Diff line number Diff line
@@ -1063,3 +1063,24 @@ const struct msm_dsi_phy_cfg dsi_phy_14nm_660_cfgs = { 
	.io_start = { 0xc994400, 0xc996000 },

	.num_dsi_phy = 2,

};



const struct msm_dsi_phy_cfg dsi_phy_14nm_8953_cfgs = {

	.has_phy_lane = true,

	.reg_cfg = {

		.num = 1,

		.regs = {

			{"vcca", 17000, 32},

		},

	},

	.ops = {

		.enable = dsi_14nm_phy_enable,

		.disable = dsi_14nm_phy_disable,

		.pll_init = dsi_pll_14nm_init,

		.save_pll_state = dsi_14nm_pll_save_state,

		.restore_pll_state = dsi_14nm_pll_restore_state,

	},

	.min_pll_rate = VCO_MIN_RATE,

	.max_pll_rate = VCO_MAX_RATE,

	.io_start = { 0x1a94400, 0x1a96400 },

	.num_dsi_phy = 2,

};