Unverified Commit 90848a25 authored by Srinivas Kandagatla's avatar Srinivas Kandagatla Committed by Mark Brown
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ASoC: qcom: q6dsp: add support to more display ports 



Existing code base only supports one display port, this patch adds
support upto 8 display ports. This support is required to allow platforms
like X13s which have 3 display ports, and some of the Qualcomm SoCs
there are upto 7 Display ports.

Signed-off-by: default avatarSrinivas Kandagatla <srinivas.kandagatla@linaro.org>
Link: https://lore.kernel.org/r/20230509112202.21471-4-srinivas.kandagatla@linaro.org


Signed-off-by: default avatarMark Brown <broonie@kernel.org>
parent a8ab6541

include/dt-bindings/sound/qcom,q6dsp-lpass-ports.h

+8 −0
Original line number Diff line number Diff line
@@ -131,6 +131,14 @@ 
#define RX_CODEC_DMA_RX_7	126

#define QUINARY_MI2S_RX		127

#define QUINARY_MI2S_TX		128

#define DISPLAY_PORT_RX_0	DISPLAY_PORT_RX

#define DISPLAY_PORT_RX_1	129

#define DISPLAY_PORT_RX_2	130

#define DISPLAY_PORT_RX_3	131

#define DISPLAY_PORT_RX_4	132

#define DISPLAY_PORT_RX_5	133

#define DISPLAY_PORT_RX_6	134

#define DISPLAY_PORT_RX_7	135



#define LPASS_CLK_ID_PRI_MI2S_IBIT	1

#define LPASS_CLK_ID_PRI_MI2S_EBIT	2

sound/soc/qcom/qdsp6/q6dsp-lpass-ports.c

+27 −16
Original line number Diff line number Diff line
@@ -79,6 +79,22 @@ 
		.id = did,						\

	}



#define Q6AFE_DP_RX_DAI(did) {						\

		.playback = {						\

			.stream_name = #did" Playback",			\

			.rates = SNDRV_PCM_RATE_48000 |			\

				SNDRV_PCM_RATE_96000 |			\

				SNDRV_PCM_RATE_192000,			\

			.formats = SNDRV_PCM_FMTBIT_S16_LE |		\

				   SNDRV_PCM_FMTBIT_S24_LE,		\

			.channels_min = 2,				\

			.channels_max = 8,				\

			.rate_min = 48000,				\

			.rate_max = 192000,				\

		},							\

		.name = #did,						\

		.id = did,						\

	}



static struct snd_soc_dai_driver q6dsp_audio_fe_dais[] = {

	{
@@ -528,22 +544,14 @@ static struct snd_soc_dai_driver q6dsp_audio_fe_dais[] = { 
	Q6AFE_TDM_CAP_DAI("Quinary", 5, QUINARY_TDM_TX_5),

	Q6AFE_TDM_CAP_DAI("Quinary", 6, QUINARY_TDM_TX_6),

	Q6AFE_TDM_CAP_DAI("Quinary", 7, QUINARY_TDM_TX_7),

	{

		.playback = {

			.stream_name = "Display Port Playback",

			.rates = SNDRV_PCM_RATE_48000 |

				 SNDRV_PCM_RATE_96000 |

				 SNDRV_PCM_RATE_192000,

			.formats = SNDRV_PCM_FMTBIT_S16_LE |

				   SNDRV_PCM_FMTBIT_S24_LE,

			.channels_min = 2,

			.channels_max = 8,

			.rate_max =     192000,

			.rate_min =	48000,

		},

		.id = DISPLAY_PORT_RX,

		.name = "DISPLAY_PORT",

	},

	Q6AFE_DP_RX_DAI(DISPLAY_PORT_RX_0),

	Q6AFE_DP_RX_DAI(DISPLAY_PORT_RX_1),

	Q6AFE_DP_RX_DAI(DISPLAY_PORT_RX_2),

	Q6AFE_DP_RX_DAI(DISPLAY_PORT_RX_3),

	Q6AFE_DP_RX_DAI(DISPLAY_PORT_RX_4),

	Q6AFE_DP_RX_DAI(DISPLAY_PORT_RX_5),

	Q6AFE_DP_RX_DAI(DISPLAY_PORT_RX_6),

	Q6AFE_DP_RX_DAI(DISPLAY_PORT_RX_7),

	Q6AFE_CDC_DMA_RX_DAI(WSA_CODEC_DMA_RX_0),

	Q6AFE_CDC_DMA_TX_DAI(WSA_CODEC_DMA_TX_0),

	Q6AFE_CDC_DMA_RX_DAI(WSA_CODEC_DMA_RX_1),
@@ -603,6 +611,9 @@ struct snd_soc_dai_driver *q6dsp_audio_ports_set_config(struct device *dev, 
		case DISPLAY_PORT_RX:

			q6dsp_audio_fe_dais[i].ops = cfg->q6hdmi_ops;

			break;

		case DISPLAY_PORT_RX_1 ... DISPLAY_PORT_RX_7:

			q6dsp_audio_fe_dais[i].ops = cfg->q6hdmi_ops;

			break;

		case SLIMBUS_0_RX ... SLIMBUS_6_TX:

			q6dsp_audio_fe_dais[i].ops = cfg->q6slim_ops;

			break;