Commit 905a6537 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'mips-fixes_5.18_1' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux 

Pull MIPS fix from Thomas Bogendoerfer:
 "Extend R4000/R4400 CPU erratum workaround to all revisions"

* tag 'mips-fixes_5.18_1' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux:
  MIPS: Fix CP0 counter erratum detection for R4k CPUs
parents 68533eb1 f0a6c68f

arch/mips/include/asm/timex.h

+4 −4
Original line number Diff line number Diff line
@@ -40,9 +40,9 @@ 
typedef unsigned int cycles_t;



/*

 * On R4000/R4400 before version 5.0 an erratum exists such that if the

 * cycle counter is read in the exact moment that it is matching the

 * compare register, no interrupt will be generated.

 * On R4000/R4400 an erratum exists such that if the cycle counter is

 * read in the exact moment that it is matching the compare register,

 * no interrupt will be generated.

 *

 * There is a suggested workaround and also the erratum can't strike if

 * the compare interrupt isn't being used as the clock source device.
@@ -63,7 +63,7 @@ static inline int can_use_mips_counter(unsigned int prid) 
	if (!__builtin_constant_p(cpu_has_counter))

		asm volatile("" : "=m" (cpu_data[0].options));

	if (likely(cpu_has_counter &&

		   prid >= (PRID_IMP_R4000 | PRID_REV_ENCODE_44(5, 0))))

		   prid > (PRID_IMP_R4000 | PRID_REV_ENCODE_44(15, 15))))

		return 1;

	else

		return 0;

arch/mips/kernel/time.c

+3 −8
Original line number Diff line number Diff line
@@ -141,15 +141,10 @@ static __init int cpu_has_mfc0_count_bug(void) 
	case CPU_R4400MC:

		/*

		 * The published errata for the R4400 up to 3.0 say the CPU

		 * has the mfc0 from count bug.

		 * has the mfc0 from count bug.  This seems the last version

		 * produced.

		 */

		if ((current_cpu_data.processor_id & 0xff) <= 0x30)

		return 1;



		/*

		 * we assume newer revisions are ok

		 */

		return 0;

	}



	return 0;