Commit 904b102f authored by Kalle Valo's avatar Kalle Valo
Browse files
ath.git patches for v6.6. Major changes:

ath12k

* Extremely High Throughput (EHT) PHY support for Wi-Fi 7
parents dd59c6a3 8198950c
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+2 −27
Original line number Diff line number Diff line
@@ -14,6 +14,7 @@
#include "ahb.h"
#include "debug.h"
#include "hif.h"
#include "qmi.h"
#include <linux/remoteproc.h>
#include "pcic.h"
#include <linux/soc/qcom/smem.h>
@@ -419,32 +420,6 @@ static void ath11k_ahb_power_down(struct ath11k_base *ab)
	rproc_shutdown(ab_ahb->tgt_rproc);
}

static int ath11k_ahb_fwreset_from_cold_boot(struct ath11k_base *ab)
{
	int timeout;

	if (ath11k_cold_boot_cal == 0 || ab->qmi.cal_done ||
	    ab->hw_params.cold_boot_calib == 0 ||
	    ab->hw_params.cbcal_restart_fw == 0)
		return 0;

	ath11k_dbg(ab, ATH11K_DBG_AHB, "wait for cold boot done\n");
	timeout = wait_event_timeout(ab->qmi.cold_boot_waitq,
				     (ab->qmi.cal_done  == 1),
				     ATH11K_COLD_BOOT_FW_RESET_DELAY);
	if (timeout <= 0) {
		ath11k_cold_boot_cal = 0;
		ath11k_warn(ab, "Coldboot Calibration failed timed out\n");
	}

	/* reset the firmware */
	ath11k_ahb_power_down(ab);
	ath11k_ahb_power_up(ab);

	ath11k_dbg(ab, ATH11K_DBG_AHB, "exited from cold boot mode\n");
	return 0;
}

static void ath11k_ahb_init_qmi_ce_config(struct ath11k_base *ab)
{
	struct ath11k_qmi_ce_cfg *cfg = &ab->qmi.ce_cfg;
@@ -1227,7 +1202,7 @@ static int ath11k_ahb_probe(struct platform_device *pdev)
		goto err_ce_free;
	}

	ath11k_ahb_fwreset_from_cold_boot(ab);
	ath11k_qmi_fwreset_from_cold_boot(ab);

	return 0;

+29 −9
Original line number Diff line number Diff line
@@ -86,7 +86,8 @@ static const struct ath11k_hw_params ath11k_hw_params[] = {
		.supports_shadow_regs = false,
		.idle_ps = false,
		.supports_sta_ps = false,
		.cold_boot_calib = true,
		.coldboot_cal_mm = true,
		.coldboot_cal_ftm = true,
		.cbcal_restart_fw = true,
		.fw_mem_mode = 0,
		.num_vdevs = 16 + 1,
@@ -167,7 +168,8 @@ static const struct ath11k_hw_params ath11k_hw_params[] = {
		.supports_shadow_regs = false,
		.idle_ps = false,
		.supports_sta_ps = false,
		.cold_boot_calib = true,
		.coldboot_cal_mm = true,
		.coldboot_cal_ftm = true,
		.cbcal_restart_fw = true,
		.fw_mem_mode = 0,
		.num_vdevs = 16 + 1,
@@ -248,7 +250,8 @@ static const struct ath11k_hw_params ath11k_hw_params[] = {
		.supports_shadow_regs = true,
		.idle_ps = true,
		.supports_sta_ps = true,
		.cold_boot_calib = false,
		.coldboot_cal_mm = false,
		.coldboot_cal_ftm = false,
		.cbcal_restart_fw = false,
		.fw_mem_mode = 0,
		.num_vdevs = 16 + 1,
@@ -332,8 +335,9 @@ static const struct ath11k_hw_params ath11k_hw_params[] = {
		.supports_shadow_regs = false,
		.idle_ps = false,
		.supports_sta_ps = false,
		.cold_boot_calib = false,
		.cbcal_restart_fw = false,
		.coldboot_cal_mm = false,
		.coldboot_cal_ftm = true,
		.cbcal_restart_fw = true,
		.fw_mem_mode = 2,
		.num_vdevs = 8,
		.num_peers = 128,
@@ -413,7 +417,8 @@ static const struct ath11k_hw_params ath11k_hw_params[] = {
		.supports_shadow_regs = true,
		.idle_ps = true,
		.supports_sta_ps = true,
		.cold_boot_calib = false,
		.coldboot_cal_mm = false,
		.coldboot_cal_ftm = false,
		.cbcal_restart_fw = false,
		.fw_mem_mode = 0,
		.num_vdevs = 16 + 1,
@@ -495,7 +500,8 @@ static const struct ath11k_hw_params ath11k_hw_params[] = {
		.supports_shadow_regs = true,
		.idle_ps = true,
		.supports_sta_ps = true,
		.cold_boot_calib = false,
		.coldboot_cal_mm = false,
		.coldboot_cal_ftm = false,
		.cbcal_restart_fw = false,
		.fw_mem_mode = 0,
		.num_vdevs = 16 + 1,
@@ -578,7 +584,8 @@ static const struct ath11k_hw_params ath11k_hw_params[] = {
		.supports_shadow_regs = true,
		.idle_ps = true,
		.supports_sta_ps = true,
		.cold_boot_calib = true,
		.coldboot_cal_mm = true,
		.coldboot_cal_ftm = true,
		.cbcal_restart_fw = false,
		.fw_mem_mode = 0,
		.num_vdevs = 16 + 1,
@@ -667,7 +674,8 @@ static const struct ath11k_hw_params ath11k_hw_params[] = {
		.supports_suspend = false,
		.hal_params = &ath11k_hw_hal_params_ipq8074,
		.single_pdev_only = false,
		.cold_boot_calib = true,
		.coldboot_cal_mm = true,
		.coldboot_cal_ftm = true,
		.cbcal_restart_fw = true,
		.fix_l1ss = true,
		.supports_dynamic_smps_6ghz = false,
@@ -749,6 +757,18 @@ void ath11k_fw_stats_free(struct ath11k_fw_stats *stats)
	ath11k_fw_stats_bcn_free(&stats->bcn);
}

bool ath11k_core_coldboot_cal_support(struct ath11k_base *ab)
{
	if (!ath11k_cold_boot_cal)
		return false;

	if (ath11k_ftm_mode)
		return ab->hw_params.coldboot_cal_ftm;

	else
		return ab->hw_params.coldboot_cal_mm;
}

int ath11k_core_suspend(struct ath11k_base *ab)
{
	int ret;
+1 −0
Original line number Diff line number Diff line
@@ -1186,6 +1186,7 @@ void ath11k_core_halt(struct ath11k *ar);
int ath11k_core_resume(struct ath11k_base *ab);
int ath11k_core_suspend(struct ath11k_base *ab);
void ath11k_core_pre_reconfigure_recovery(struct ath11k_base *ab);
bool ath11k_core_coldboot_cal_support(struct ath11k_base *ab);

const struct firmware *ath11k_core_firmware_request(struct ath11k_base *ab,
						    const char *filename);
+1 −1
Original line number Diff line number Diff line
@@ -2408,7 +2408,7 @@ static void ath11k_dp_rx_h_ppdu(struct ath11k *ar, struct hal_rx_desc *rx_desc,
		rx_status->freq = center_freq;
	} else if (channel_num >= 1 && channel_num <= 14) {
		rx_status->band = NL80211_BAND_2GHZ;
	} else if (channel_num >= 36 && channel_num <= 173) {
	} else if (channel_num >= 36 && channel_num <= 177) {
		rx_status->band = NL80211_BAND_5GHZ;
	} else {
		spin_lock_bh(&ar->data_lock);
+2 −1
Original line number Diff line number Diff line
@@ -187,7 +187,8 @@ struct ath11k_hw_params {
	bool supports_shadow_regs;
	bool idle_ps;
	bool supports_sta_ps;
	bool cold_boot_calib;
	bool coldboot_cal_mm;
	bool coldboot_cal_ftm;
	bool cbcal_restart_fw;
	int fw_mem_mode;
	u32 num_vdevs;
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