Commit 8ff99ad0 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'phy-for-6.3' of git://git.kernel.org/pub/scm/linux/kernel/git/phy/linux-phy 

Pull phy updates from Vinod Koul:
 "This features a bunch of new device support, a couple of new drivers,
  yaml conversion and updates of a few drivers.

  Core support:

   - New devm_of_phy_optional_get() API with users and conversion

  New hardware support:

   - Mediatek MT7986 phy support

   - Qualcomm SM8550 UFS, PCIe, combo phy support, SM6115 / SM4250 USB3
     phy support, SM6350 combo phy support, SM6125 UFS PHY support amd
     SM8350 & SM8450 combo phy support

   - Qualcomm SNPS eUSB2 eUSB2 repeater drivers

   - Allwinner F1C100s USB PHY support

   - Tegra xusb support for Tegra234

  Updates:

   - Yaml conversion for Qualcomm pcie2 phy and usb-hsic-phy

   - G4 mode support in Qualcomm UFS phy and support for various SoCs

   - Yaml conversion for Meson usb2 phy

   - TI Type C support for usb phy for j721

   - Yaml conversion for Tegra xusb binding"

* tag 'phy-for-6.3' of git://git.kernel.org/pub/scm/linux/kernel/git/phy/linux-phy: (106 commits)
  phy: qcom: phy-qcom-snps-eusb2: Add support for eUSB2 repeater
  phy: qcom: Add QCOM SNPS eUSB2 repeater driver
  dt-bindings: phy: qcom,snps-eusb2-phy: Add phys property for the repeater
  dt-bindings: phy: Add qcom,snps-eusb2-repeater schema file
  dt-bindings: phy: amlogic,g12a-usb3-pcie-phy: add missing optional phy-supply property
  phy: rockchip-typec: Fix unsigned comparison with less than zero
  phy: rockchip-typec: fix tcphy_get_mode error case
  phy: qcom: snps-eusb2: Add missing headers
  phy: qcom-qmp-combo: Add support for SM8550
  phy: qcom-qmp: Add v6 DP register offsets
  phy: qcom-qmp: pcs-usb: Add v6 register offsets
  dt-bindings: phy: qcom,sc8280xp-qmp-usb43dp: Document SM8550 compatible
  phy: qcom: Add QCOM SNPS eUSB2 driver
  dt-bindings: phy: Add qcom,snps-eusb2-phy schema file
  phy: qcom-qmp-pcie: Add support for SM8550 g3x2 and g4x2 PCIEs
  phy: qcom-qmp: qserdes-lane-shared: Add v6 register offsets
  phy: qcom-qmp: qserdes-txrx: Add v6.20 register offsets
  phy: qcom-qmp: pcs-pcie: Add v6.20 register offsets
  phy: qcom-qmp: pcs-pcie: Add v6 register offsets
  phy: qcom-qmp: pcs: Add v6.20 register offsets
  ...
parents 9e6bfd42 3584f639

Documentation/devicetree/bindings/phy/allwinner,suniv-f1c100s-usb-phy.yaml

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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)

%YAML 1.2

---

$id: http://devicetree.org/schemas/phy/allwinner,suniv-f1c100s-usb-phy.yaml#

$schema: http://devicetree.org/meta-schemas/core.yaml#



title: Allwinner F1C100s USB PHY



maintainers:

  - Chen-Yu Tsai <wens@csie.org>

  - Maxime Ripard <mripard@kernel.org>



properties:

  "#phy-cells":

    const: 1



  compatible:

    const: allwinner,suniv-f1c100s-usb-phy



  reg:

    maxItems: 1

    description: PHY Control registers



  reg-names:

    const: phy_ctrl



  clocks:

    maxItems: 1

    description: USB OTG PHY bus clock



  clock-names:

    const: usb0_phy



  resets:

    maxItems: 1

    description: USB OTG reset



  reset-names:

    const: usb0_reset



  usb0_id_det-gpios:

    maxItems: 1

    description: GPIO to the USB OTG ID pin



  usb0_vbus_det-gpios:

    maxItems: 1

    description: GPIO to the USB OTG VBUS detect pin



  usb0_vbus_power-supply:

    description: Power supply to detect the USB OTG VBUS



  usb0_vbus-supply:

    description: Regulator controlling USB OTG VBUS



required:

  - "#phy-cells"

  - compatible

  - clocks

  - clock-names

  - reg

  - reg-names

  - resets

  - reset-names



additionalProperties: false



examples:

  - |

    #include <dt-bindings/gpio/gpio.h>

    #include <dt-bindings/clock/suniv-ccu-f1c100s.h>

    #include <dt-bindings/reset/suniv-ccu-f1c100s.h>



    phy@1c13400 {

        compatible = "allwinner,suniv-f1c100s-usb-phy";

        reg = <0x01c13400 0x10>;

        reg-names = "phy_ctrl";

        clocks = <&ccu CLK_USB_PHY0>;

        clock-names = "usb0_phy";

        resets = <&ccu RST_USB_PHY0>;

        reset-names = "usb0_reset";

        #phy-cells = <1>;

        usb0_id_det-gpios = <&pio 4 2 GPIO_ACTIVE_HIGH>;

    };

Documentation/devicetree/bindings/phy/amlogic,g12a-usb3-pcie-phy.yaml

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@@ -35,6 +35,11 @@ properties: 
  "#phy-cells":

    const: 1



  phy-supply:

    description:

      Phandle to a regulator that provides power to the PHY. This

      regulator will be managed during the PHY power on/off sequence.



required:

  - compatible

  - reg

Documentation/devicetree/bindings/phy/amlogic,meson-gxl-usb2-phy.yaml

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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)

%YAML 1.2

---

$id: http://devicetree.org/schemas/phy/amlogic,meson-gxl-usb2-phy.yaml#

$schema: http://devicetree.org/meta-schemas/core.yaml#



title: Amlogic Meson GXL USB2 PHY



maintainers:

  - Neil Armstrong <neil.armstrong@linaro.org>



properties:

  compatible:

    const: amlogic,meson-gxl-usb2-phy



  reg:

    maxItems: 1



  clocks:

    maxItems: 1



  clock-names:

    items:

      - const: phy



  resets:

    maxItems: 1



  reset-names:

    items:

      - const: phy



  "#phy-cells":

    const: 0



  phy-supply: true



required:

  - compatible

  - reg

  - "#phy-cells"



additionalProperties: false



examples:

  - |

    phy@78000 {

        compatible = "amlogic,meson-gxl-usb2-phy";

        reg = <0x78000 0x20>;

        clocks = <&xtal>;

        clock-names = "phy";

        resets = <&phy_reset>;

        reset-names = "phy";

        #phy-cells = <0>;

        phy-supply = <&usb2_supply>;

    };

Documentation/devicetree/bindings/phy/mediatek,tphy.yaml

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@@ -79,6 +79,7 @@ properties: 
          - enum:

              - mediatek,mt2712-tphy

              - mediatek,mt7629-tphy

              - mediatek,mt7986-tphy

              - mediatek,mt8183-tphy

              - mediatek,mt8186-tphy

              - mediatek,mt8192-tphy

Documentation/devicetree/bindings/phy/meson-gxl-usb2-phy.txt

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* Amlogic Meson GXL and GXM USB2 PHY binding



Required properties:

- compatible:	Should be "amlogic,meson-gxl-usb2-phy"

- reg:		The base address and length of the registers

- #phys-cells:	must be 0 (see phy-bindings.txt in this directory)



Optional properties:

- clocks:	a phandle to the clock of this PHY

- clock-names:	must be "phy"

- resets:	a phandle to the reset line of this PHY

- reset-names:	must be "phy"

- phy-supply:	see phy-bindings.txt in this directory





Example:

	usb2_phy0: phy@78000 {

		compatible = "amlogic,meson-gxl-usb2-phy";

		#phy-cells = <0>;

		reg = <0x0 0x78000 0x0 0x20>;

	};