Commit 8fd2c7e0 authored by Kan Liang's avatar Kan Liang Committed by Yunying Sun
Browse files

perf/x86/intel/ds: Fix non 0 retire latency on Raptorlake

mainline inclusion
from mainline-v6.11-rc1
commit e5f32ad56b22ebe384a6e7ddad6e9520c5495563
category: bugfix
bugzilla: https://gitee.com/openeuler/intel-kernel/issues/IAIG7E
CVE: NA

Reference: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=e5f32ad56b22ebe384a6e7ddad6e9520c5495563



-------------------------------------

A non-0 retire latency can be observed on a Raptorlake which doesn't
support the retire latency feature.
By design, the retire latency shares the PERF_SAMPLE_WEIGHT_STRUCT
sample type with other types of latency. That could avoid adding too
many different sample types to support all kinds of latency. For the
machine which doesn't support some kind of latency, 0 should be
returned.

Perf doesn’t clear/init all the fields of a sample data for the sake
of performance. It expects the later perf_{prepare,output}_sample() to
update the uninitialized field. However, the current implementation
doesn't touch the field of the retire latency if the feature is not
supported. The memory garbage is dumped into the perf data.

Clear the retire latency if the feature is not supported.

Intel-SIG: commit e5f32ad56b22 perf/x86/intel/ds: Fix non 0 retire latency on Raptorlake
Backport some core PMU bugfixes to kernel 5.10

Fixes: c87a3109 ("perf/x86: Support Retire Latency")
Reported-by: default avatar"Bayduraev, Alexey V" <alexey.v.bayduraev@intel.com>
Signed-off-by: default avatarKan Liang <kan.liang@linux.intel.com>
Signed-off-by: default avatarPeter Zijlstra (Intel) <peterz@infradead.org>
Tested-by: default avatar"Bayduraev, Alexey V" <alexey.v.bayduraev@intel.com>
Cc: stable@vger.kernel.org
Link: https://lkml.kernel.org/r/20240708193336.1192217-4-kan.liang@linux.intel.com


Signed-off-by: default avatarYunying Sun <yunying.sun@intel.com>
parent 2d99e804
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+6 −2
Original line number Diff line number Diff line
@@ -1778,8 +1778,12 @@ static void setup_pebs_adaptive_sample_data(struct perf_event *event,
	set_linear_ip(regs, basic->ip);
	regs->flags = PERF_EFLAGS_EXACT;

	if ((sample_type & PERF_SAMPLE_WEIGHT_STRUCT) && (x86_pmu.flags & PMU_FL_RETIRE_LATENCY))
	if (sample_type & PERF_SAMPLE_WEIGHT_STRUCT) {
		if (x86_pmu.flags & PMU_FL_RETIRE_LATENCY)
			data->weight.var3_w = format_size >> PEBS_RETIRE_LATENCY_OFFSET & PEBS_LATENCY_MASK;
		else
			data->weight.var3_w = 0;
	}

	/*
	 * The record for MEMINFO is in front of GP