Commit 8f9b0513 authored by Jiri Pirko's avatar Jiri Pirko Committed by Jakub Kicinski
Browse files

mlxsw: reg: Add Management DownStream Device Tunneling Register 



The MDDT register allows to deliver query and request messages (PRM
registers, commands) to a DownStream device.

Signed-off-by: default avatarJiri Pirko <jiri@nvidia.com>
Signed-off-by: default avatarIdo Schimmel <idosch@nvidia.com>
Signed-off-by: default avatarJakub Kicinski <kuba@kernel.org>
parent 4da0eb2a

drivers/net/ethernet/mellanox/mlxsw/reg.h

+90 −0
Original line number Diff line number Diff line
@@ -11364,6 +11364,95 @@ mlxsw_reg_mbct_unpack(const char *payload, u8 *p_slot_index, 
		*p_fsm_state = mlxsw_reg_mbct_fsm_state_get(payload);

}



/* MDDT - Management DownStream Device Tunneling Register

 * ------------------------------------------------------

 * This register allows to deliver query and request messages (PRM registers,

 * commands) to a DownStream device.

 */

#define MLXSW_REG_MDDT_ID 0x9160

#define MLXSW_REG_MDDT_LEN 0x110



MLXSW_REG_DEFINE(mddt, MLXSW_REG_MDDT_ID, MLXSW_REG_MDDT_LEN);



/* reg_mddt_slot_index

 * Slot index.

 * Access: Index

 */

MLXSW_ITEM32(reg, mddt, slot_index, 0x00, 8, 4);



/* reg_mddt_device_index

 * Device index.

 * Access: Index

 */

MLXSW_ITEM32(reg, mddt, device_index, 0x00, 0, 8);



/* reg_mddt_read_size

 * Read size in D-Words.

 * Access: OP

 */

MLXSW_ITEM32(reg, mddt, read_size, 0x04, 24, 8);



/* reg_mddt_write_size

 * Write size in D-Words.

 * Access: OP

 */

MLXSW_ITEM32(reg, mddt, write_size, 0x04, 16, 8);



enum mlxsw_reg_mddt_status {

	MLXSW_REG_MDDT_STATUS_OK,

};



/* reg_mddt_status

 * Return code of the Downstream Device to the register that was sent.

 * Access: RO

 */

MLXSW_ITEM32(reg, mddt, status, 0x0C, 24, 8);



enum mlxsw_reg_mddt_method {

	MLXSW_REG_MDDT_METHOD_QUERY,

	MLXSW_REG_MDDT_METHOD_WRITE,

};



/* reg_mddt_method

 * Access: OP

 */

MLXSW_ITEM32(reg, mddt, method, 0x0C, 22, 2);



/* reg_mddt_register_id

 * Access: Index

 */

MLXSW_ITEM32(reg, mddt, register_id, 0x0C, 0, 16);



#define MLXSW_REG_MDDT_PAYLOAD_OFFSET 0x0C

#define MLXSW_REG_MDDT_PRM_REGISTER_HEADER_LEN 4



static inline char *mlxsw_reg_mddt_inner_payload(char *payload)

{

	return payload + MLXSW_REG_MDDT_PAYLOAD_OFFSET +

	       MLXSW_REG_MDDT_PRM_REGISTER_HEADER_LEN;

}



static inline void mlxsw_reg_mddt_pack(char *payload, u8 slot_index,

				       u8 device_index,

				       enum mlxsw_reg_mddt_method method,

				       const struct mlxsw_reg_info *reg,

				       char **inner_payload)

{

	int len = reg->len + MLXSW_REG_MDDT_PRM_REGISTER_HEADER_LEN;



	if (WARN_ON(len + MLXSW_REG_MDDT_PAYLOAD_OFFSET > MLXSW_REG_MDDT_LEN))

		len = MLXSW_REG_MDDT_LEN - MLXSW_REG_MDDT_PAYLOAD_OFFSET;



	MLXSW_REG_ZERO(mddt, payload);

	mlxsw_reg_mddt_slot_index_set(payload, slot_index);

	mlxsw_reg_mddt_device_index_set(payload, device_index);

	mlxsw_reg_mddt_method_set(payload, method);

	mlxsw_reg_mddt_register_id_set(payload, reg->id);

	mlxsw_reg_mddt_read_size_set(payload, len / 4);

	mlxsw_reg_mddt_write_size_set(payload, len / 4);

	*inner_payload = mlxsw_reg_mddt_inner_payload(payload);

}



/* MDDQ - Management DownStream Device Query Register

 * --------------------------------------------------

 * This register allows to query the DownStream device properties. The desired
@@ -12943,6 +13032,7 @@ static const struct mlxsw_reg_info *mlxsw_reg_infos[] = { 
	MLXSW_REG(mfgd),

	MLXSW_REG(mgpir),

	MLXSW_REG(mbct),

	MLXSW_REG(mddt),

	MLXSW_REG(mddq),

	MLXSW_REG(mddc),

	MLXSW_REG(mfde),