Commit 8f900363 authored by George Cherian's avatar George Cherian Committed by David S. Miller
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octeontx2-af: Add support for VLAN based RSS hashing 



Added support for PF/VF drivers to choose RSS flow key algorithm
with VLAN tag included in hashing input data. Only CTAG is considered.

Signed-off-by: default avatarGeorge Cherian <george.cherian@marvell.com>
Signed-off-by: default avatarSunil Goutham <sgoutham@marvell.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent de2b541b

drivers/net/ethernet/marvell/octeontx2/af/mbox.h

+1 −0
Original line number Diff line number Diff line
@@ -625,6 +625,7 @@ struct nix_rss_flowkey_cfg { 
#define NIX_FLOW_KEY_TYPE_INNR_UDP      BIT(15)

#define NIX_FLOW_KEY_TYPE_INNR_SCTP     BIT(16)

#define NIX_FLOW_KEY_TYPE_INNR_ETH_DMAC BIT(17)

#define NIX_FLOW_KEY_TYPE_VLAN		BIT(20)

	u32	flowkey_cfg; /* Flowkey types selected */

	u8	group;       /* RSS context or group */

};

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

+8 −0
Original line number Diff line number Diff line
@@ -2509,6 +2509,14 @@ static int set_flowkey_fields(struct nix_rx_flowkey_alg *alg, u32 flow_cfg) 
			field->ltype_match = NPC_LT_LE_GTPU;

			field->ltype_mask = 0xF;

			break;

		case NIX_FLOW_KEY_TYPE_VLAN:

			field->lid = NPC_LID_LB;

			field->hdr_offset = 2; /* Skip TPID (2-bytes) */

			field->bytesm1 = 1; /* 2 Bytes (Actually 12 bits) */

			field->ltype_match = NPC_LT_LB_CTAG;

			field->ltype_mask = 0xF;

			field->fn_mask = 1; /* Mask out the first nibble */

			break;

		}

		field->ena = 1;