Commit 8f769e58 authored by Yanan Wang's avatar Yanan Wang Committed by Zheng Zengkai
Browse files

KVM: arm64: Only probe Hisi ncsnp feature on Hisi CPUs

virt inclusion
category: feature
bugzilla: https://gitee.com/openeuler/kernel/issues/I5WHHV


CVE: NA

----------------------------------------------------

The "ncsnp" is an implementation specific CPU virtualization
feature on Hisi 1620 series CPUs. This feature works just
like ARM standard S2FWB to reduce some cache management
operations in virtualization.

Given that it's Hisi specific feature, let's restrict the
detection only to Hisi CPUs. To realize this:
1) Add a sub-directory `hisilicon/` within arch/arm64/kvm to
hold code for Hisi specific virtualization features.
2) Add a new kconfig option `CONFIG_KVM_HISI_VIRT` for users
to select the whole Hisi specific virtualization features.
3) Add a generic global KVM variable `kvm_ncsnp_support`
which is `false` by default. Only re-initialize it when
we have `CONFIG_KVM_HISI_VIRT` enabled.

Signed-off-by: default avatarYanan Wang <wangyanan55@huawei.com>
Reviewed-by: default avatarZenghui Yu <yuzenghui@huawei.com>
Signed-off-by: default avatarZheng Zengkai <zhengzengkai@huawei.com>
parent 6df5eee6
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+1 −0
Original line number Diff line number Diff line
@@ -744,6 +744,7 @@ CONFIG_HAVE_KVM_ARCH_TLB_FLUSH_ALL=y
CONFIG_KVM_GENERIC_DIRTYLOG_READ_PROTECT=y
CONFIG_HAVE_KVM_IRQ_BYPASS=y
CONFIG_HAVE_KVM_VCPU_RUN_PID_CHANGE=y
CONFIG_KVM_HISI_VIRT=y
CONFIG_KVM_ARM_PMU=y
CONFIG_ARM64_CRYPTO=y
CONFIG_CRYPTO_SHA256_ARM64=m
+2 −1
Original line number Diff line number Diff line
@@ -26,7 +26,6 @@
#include <asm/kvm.h>
#include <asm/kvm_asm.h>
#include <asm/thread_info.h>
#include <asm/hisi_cpu_model.h>

#define __KVM_HAVE_ARCH_INTC_INITIALIZED

@@ -715,4 +714,6 @@ extern unsigned int twedel;
#define use_twed() (false)
#endif

extern bool kvm_ncsnp_support;

#endif /* __ARM64_KVM_HOST_H__ */
+1 −0
Original line number Diff line number Diff line
@@ -49,6 +49,7 @@ menuconfig KVM
if KVM

source "virt/kvm/Kconfig"
source "arch/arm64/kvm/hisilicon/Kconfig"

config KVM_ARM_PMU
	bool "Virtual Performance Monitoring Unit (PMU) support"
+1 −1
Original line number Diff line number Diff line
@@ -17,7 +17,6 @@ kvm-y := $(KVM)/kvm_main.o $(KVM)/coalesced_mmio.o $(KVM)/eventfd.o \
	 guest.o debug.o reset.o sys_regs.o \
	 vgic-sys-reg-v3.o fpsimd.o pmu.o \
	 aarch32.o arch_timer.o trng.o\
	 hisi_cpu_model.o \
	 vgic/vgic.o vgic/vgic-init.o \
	 vgic/vgic-irqfd.o vgic/vgic-v2.o \
	 vgic/vgic-v3.o vgic/vgic-v4.o \
@@ -26,3 +25,4 @@ kvm-y := $(KVM)/kvm_main.o $(KVM)/coalesced_mmio.o $(KVM)/eventfd.o \
	 vgic/vgic-its.o vgic/vgic-debug.o

kvm-$(CONFIG_KVM_ARM_PMU)  += pmu-emul.o
obj-$(CONFIG_KVM_HISI_VIRT) += hisilicon/
+9 −4
Original line number Diff line number Diff line
@@ -47,6 +47,10 @@
__asm__(".arch_extension	virt");
#endif

#ifdef CONFIG_KVM_HISI_VIRT
#include "hisilicon/hisi_virt.h"
#endif

DECLARE_KVM_HYP_PER_CPU(unsigned long, kvm_hyp_vector);

static DEFINE_PER_CPU(unsigned long, kvm_arm_hyp_stack_page);
@@ -59,8 +63,7 @@ static DEFINE_SPINLOCK(kvm_vmid_lock);

static bool vgic_present;

/* Hisi cpu type enum */
enum hisi_cpu_type hi_cpu_type = UNKNOWN_HI_TYPE;
/* Capability of non-cacheable snooping */
bool kvm_ncsnp_support;

static DEFINE_PER_CPU(unsigned char, kvm_arm_hardware_enabled);
@@ -1859,9 +1862,11 @@ int kvm_arch_init(void *opaque)
		return -ENODEV;
	}

	/* Probe the Hisi CPU type */
#ifdef CONFIG_KVM_HISI_VIRT
	probe_hisi_cpu_type();
	probe_hisi_ncsnp_support();
	kvm_ncsnp_support = hisi_ncsnp_supported();
#endif
	kvm_info("KVM ncsnp %s\n", kvm_ncsnp_support ? "enabled" : "disabled");

	in_hyp_mode = is_kernel_in_hyp_mode();

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