Commit 8f73a688 authored by Jason Gaston's avatar Jason Gaston Committed by Jeff Garzik
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ata_piix: SATA 2port controller port map fix 



This patch adds a port map for ICH9 and ICH8 SATA controllers that have only 2 ports available in that mode.

Signed-off-by: default avatarJason Gaston <jason.d.gaston@intel.com>
Signed-off-by: default avatarJeff Garzik <jeff@garzik.org>
parent 3957df61

drivers/ata/ata_piix.c

+30 −5
Original line number Diff line number Diff line
@@ -130,6 +130,7 @@ enum { 
	ich8_sata_ahci		= 9,

	piix_pata_mwdma		= 10,	/* PIIX3 MWDMA only */

	tolapai_sata_ahci	= 11,

	ich9_2port_sata		= 12,



	/* constants for mapping table */

	P0			= 0,  /* port 0 */
@@ -238,19 +239,19 @@ static const struct pci_device_id piix_pci_tbl[] = { 
	/* SATA Controller 1 IDE (ICH8) */

	{ 0x8086, 0x2820, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_sata_ahci },

	/* SATA Controller 2 IDE (ICH8) */

	{ 0x8086, 0x2825, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_sata_ahci },

	{ 0x8086, 0x2825, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich9_2port_sata },

	/* Mobile SATA Controller IDE (ICH8M) */

	{ 0x8086, 0x2828, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_sata_ahci },

	/* SATA Controller IDE (ICH9) */

	{ 0x8086, 0x2920, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_sata_ahci },

	/* SATA Controller IDE (ICH9) */

	{ 0x8086, 0x2921, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_sata_ahci },

	{ 0x8086, 0x2921, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich9_2port_sata },

	/* SATA Controller IDE (ICH9) */

	{ 0x8086, 0x2926, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_sata_ahci },

	{ 0x8086, 0x2926, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich9_2port_sata },

	/* SATA Controller IDE (ICH9M) */

	{ 0x8086, 0x2928, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_sata_ahci },

	{ 0x8086, 0x2928, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich9_2port_sata },

	/* SATA Controller IDE (ICH9M) */

	{ 0x8086, 0x292d, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_sata_ahci },

	{ 0x8086, 0x292d, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich9_2port_sata },

	/* SATA Controller IDE (ICH9M) */

	{ 0x8086, 0x292e, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_sata_ahci },

	/* SATA Controller IDE (Tolapai) */
@@ -448,6 +449,18 @@ static const struct piix_map_db tolapai_map_db = { 
	},

};



static const struct piix_map_db ich9_2port_map_db = {

	.mask = 0x3,

	.port_enable = 0x3,

	.map = {

		/* PM   PS   SM   SS       MAP */

		{  P0,  NA,  P1,  NA }, /* 00b */

		{  RV,  RV,  RV,  RV }, /* 01b */

		{  RV,  RV,  RV,  RV }, /* 10b */

		{  RV,  RV,  RV,  RV },

	},

};



static const struct piix_map_db *piix_map_db_table[] = {

	[ich5_sata]		= &ich5_map_db,

	[ich6_sata]		= &ich6_map_db,
@@ -455,6 +468,7 @@ static const struct piix_map_db *piix_map_db_table[] = { 
	[ich6m_sata_ahci]	= &ich6m_map_db,

	[ich8_sata_ahci]	= &ich8_map_db,

	[tolapai_sata_ahci]	= &tolapai_map_db,

	[ich9_2port_sata]	= &ich9_2port_map_db,

};



static struct ata_port_info piix_port_info[] = {
@@ -570,6 +584,17 @@ static struct ata_port_info piix_port_info[] = { 
		.udma_mask	= ATA_UDMA6,

		.port_ops	= &piix_sata_ops,

	},



	[ich9_2port_sata] =

	{

		.sht		= &piix_sht,

		.flags		= PIIX_SATA_FLAGS | PIIX_FLAG_SCR |

				  PIIX_FLAG_AHCI,

		.pio_mask	= 0x1f,	/* pio0-4 */

		.mwdma_mask	= 0x07, /* mwdma0-2 */

		.udma_mask	= ATA_UDMA6,

		.port_ops	= &piix_sata_ops,

	},

};



static struct pci_bits piix_enable_bits[] = {