Commit 8f5a0b9d authored by Richard Kuo's avatar Richard Kuo
Browse files

Hexagon: add support for ARCH_PFN_OFFSET 



Add support for loading the kernel at a physical offset.  The
offset should still be 4M aligned.

Signed-off-by: default avatarRichard Kuo <rkuo@codeaurora.org>
parent e0025a72

arch/hexagon/Kconfig

+6 −0
Original line number Diff line number Diff line
@@ -33,6 +33,7 @@ config HEXAGON 
	  Qualcomm Hexagon is a processor architecture designed for high

	  performance and low power across a wide variety of applications.





config HEXAGON_ARCH_V1

	bool
@@ -45,6 +46,11 @@ config HEXAGON_ARCH_V3 
config HEXAGON_ARCH_V4

	bool



config HEXAGON_PHYS_OFFSET

	def_bool y

	---help---

	  Platforms that don't load the kernel at zero set this.



config FRAME_POINTER

	def_bool y

arch/hexagon/include/asm/hexagon_vm.h

+24 −23
Original line number Diff line number Diff line
@@ -31,10 +31,26 @@ 
 * for tracing/debugging.

 */



/*

 * Lets make this stuff visible only if configured,

 * so we can unconditionally include the file.

 */

#define HVM_TRAP1_VMVERSION		0

#define HVM_TRAP1_VMRTE			1

#define HVM_TRAP1_VMSETVEC		2

#define HVM_TRAP1_VMSETIE		3

#define HVM_TRAP1_VMGETIE		4

#define HVM_TRAP1_VMINTOP		5

#define HVM_TRAP1_VMCLRMAP		10

#define HVM_TRAP1_VMNEWMAP		11

#define HVM_TRAP1_FORMERLY_VMWIRE	12

#define HVM_TRAP1_VMCACHE		13

#define HVM_TRAP1_VMGETTIME		14

#define HVM_TRAP1_VMSETTIME		15

#define HVM_TRAP1_VMWAIT		16

#define HVM_TRAP1_VMYIELD		17

#define HVM_TRAP1_VMSTART		18

#define HVM_TRAP1_VMSTOP		19

#define HVM_TRAP1_VMVPID		20

#define HVM_TRAP1_VMSETREGS		21

#define HVM_TRAP1_VMGETREGS		22

#define HVM_TRAP1_VMTIMEROP		24



#ifndef __ASSEMBLY__
@@ -175,25 +191,6 @@ static inline long __vmintop_clear(long i) 


#else /* Only assembly code should reference these */



#define HVM_TRAP1_VMRTE			1

#define HVM_TRAP1_VMSETVEC		2

#define HVM_TRAP1_VMSETIE		3

#define HVM_TRAP1_VMGETIE		4

#define HVM_TRAP1_VMINTOP		5

#define HVM_TRAP1_VMCLRMAP		10

#define HVM_TRAP1_VMNEWMAP		11

#define HVM_TRAP1_FORMERLY_VMWIRE	12

#define HVM_TRAP1_VMCACHE		13

#define HVM_TRAP1_VMGETTIME		14

#define HVM_TRAP1_VMSETTIME		15

#define HVM_TRAP1_VMWAIT		16

#define HVM_TRAP1_VMYIELD		17

#define HVM_TRAP1_VMSTART		18

#define HVM_TRAP1_VMSTOP		19

#define HVM_TRAP1_VMVPID		20

#define HVM_TRAP1_VMSETREGS		21

#define HVM_TRAP1_VMGETREGS		22



#endif /* __ASSEMBLY__ */



/*
@@ -224,6 +221,8 @@ static inline long __vmintop_clear(long i) 
#define HVM_VMEST_UM_MSK	1

#define HVM_VMEST_IE_SFT	30

#define HVM_VMEST_IE_MSK	1

#define HVM_VMEST_SS_SFT	29

#define HVM_VMEST_SS_MSK	1

#define HVM_VMEST_EVENTNUM_SFT	16

#define HVM_VMEST_EVENTNUM_MSK	0xff

#define HVM_VMEST_CAUSE_SFT	0
@@ -260,6 +259,8 @@ static inline long __vmintop_clear(long i) 
#define HVM_GE_C_INVI	0x15

#define HVM_GE_C_PRIVI	0x1B

#define HVM_GE_C_XMAL	0x1C

#define HVM_GE_C_WREG	0x1D

#define HVM_GE_C_PCAL	0x1E

#define HVM_GE_C_RMAL	0x20

#define HVM_GE_C_WMAL	0x21

#define HVM_GE_C_RPROT	0x22

arch/hexagon/include/asm/mem-layout.h

+15 −6
Original line number Diff line number Diff line
@@ -32,16 +32,25 @@ 
#define PAGE_OFFSET			_AC(0xc0000000, UL)



/*

 * LOAD_ADDRESS is the physical/linear address of where in memory

 * the kernel gets loaded. The 12 least significant bits must be zero (0)

 * due to limitations on setting the EVB

 *

 * Compiling for a platform that needs a crazy physical offset

 * (like if the memory starts at 1GB and up) means we need

 * an actual PHYS_OFFSET.  Should be set up in head.S.

 */



#ifndef LOAD_ADDRESS

#define LOAD_ADDRESS			0x00000000

#ifdef CONFIG_HEXAGON_PHYS_OFFSET

#ifndef __ASSEMBLY__

extern unsigned long	__phys_offset;

#endif

#define PHYS_OFFSET	__phys_offset

#endif



#ifndef PHYS_OFFSET

#define PHYS_OFFSET	0

#endif



#define PHYS_PFN_OFFSET	(PHYS_OFFSET >> PAGE_SHIFT)

#define ARCH_PFN_OFFSET	PHYS_PFN_OFFSET



#define TASK_SIZE			(PAGE_OFFSET)



/*  not sure how these are used yet  */

arch/hexagon/include/asm/page.h

+3 −2
Original line number Diff line number Diff line
@@ -96,8 +96,8 @@ typedef struct page *pgtable_t; 
 * MIPS says they're only used during mem_init.

 * also, check if we need a PHYS_OFFSET.

 */

#define __pa(x) ((unsigned long)(x) - PAGE_OFFSET)

#define __va(x) ((void *)((unsigned long)(x) + PAGE_OFFSET))

#define __pa(x) ((unsigned long)(x) - PAGE_OFFSET + PHYS_OFFSET)

#define __va(x) ((void *)((unsigned long)(x) - PHYS_OFFSET + PAGE_OFFSET))



/* The "page frame" descriptor is defined in linux/mm.h */

struct page;
@@ -147,6 +147,7 @@ static inline void clear_page(void *page) 
 */

#define kern_addr_valid(addr)   (1)



#include <asm/mem-layout.h>

#include <asm-generic/memory_model.h>

/* XXX Todo: implement assembly-optimized version of getorder. */

#include <asm-generic/getorder.h>

arch/hexagon/kernel/head.S

+18 −4
Original line number Diff line number Diff line
@@ -43,14 +43,21 @@ ENTRY(stext) 
	 * Symbol is kernel segment address, but we need

	 * the logical/physical address.

	 */

	r24 = asl(r24, #2)

	r24 = lsr(r24, #2)

	r25 = pc;

	r2.h = #0xffc0;

	r2.l = #0x0000;

	r25 = and(r2,r25);	/*  R25 holds PHYS_OFFSET now  */

	r1.h = #HI(PAGE_OFFSET);

	r1.l = #LO(PAGE_OFFSET);

	r24 = sub(r24,r1);	/* swapper_pg_dir - PAGE_OFFSET */

	r24 = add(r24,r25);	/* + PHYS_OFFSET */



	r0 = r24

	r0 = r24;  /* aka __pa(swapper_pg_dir)  */



	/*

	 * Initialize a 16MB PTE to make the virtual and physical

	 * Initialize page dir to make the virtual and physical

	 * addresses where the kernel was loaded be identical.

	 * Done in 4MB chunks.

	 */

#define PTE_BITS ( __HVM_PTE_R | __HVM_PTE_W | __HVM_PTE_X	\

		  | __HEXAGON_C_WB_L2 << 6			\
@@ -143,6 +150,13 @@ __head_s_vaddr_target: 
	r2 = sub(r2,r0);

	call memset;



	/*  Set PHYS_OFFSET; should still be in R25 */

#ifdef CONFIG_HEXAGON_PHYS_OFFSET

	r0.l = #LO(__phys_offset);

	r0.h = #HI(__phys_offset);

	memw(r0) = r25;

#endif



	/* Time to make the doughnuts.   */

	call start_kernel