Commit 8ef55603 authored by Mark Brown's avatar Mark Brown Committed by Catalin Marinas
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arm64/esr: Document ISS for ZT0 being disabled 



SME2 defines a new ISS code for use when trapping acesses to ZT0, add a
definition for it.

Signed-off-by: default avatarMark Brown <broonie@kernel.org>
Link: https://lore.kernel.org/r/20221208-arm64-sme2-v4-5-f2fa0aef982f@kernel.org


Signed-off-by: default avatarCatalin Marinas <catalin.marinas@arm.com>
parent 4edc1174

arch/arm64/include/asm/esr.h

+1 −0
Original line number Diff line number Diff line
@@ -341,6 +341,7 @@ 
#define ESR_ELx_SME_ISS_ILL		1

#define ESR_ELx_SME_ISS_SM_DISABLED	2

#define ESR_ELx_SME_ISS_ZA_DISABLED	3

#define ESR_ELx_SME_ISS_ZT_DISABLED	4



#ifndef __ASSEMBLY__

#include <asm/types.h>