Commit 8eca6b0a authored by Linus Torvalds's avatar Linus Torvalds
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Merge tag 'pwm/for-5.19-rc1' of...

Merge tag 'pwm/for-5.19-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/thierry.reding/linux-pwm

Pull pwm updates from Thierry Reding:
 "Quite a large number of conversions this time around, courtesy of Uwe
  who has been working tirelessly on these. No drivers of the legacy API
  are left at this point, so as a next step the old API can be removed.

  Support is added for a few new devices such as the Xilinx AXI timer-
  based PWMs and the PWM IP found on Sunplus SoCs.

  Other than that, there's a number of fixes, cleanups and optimizations"

* tag 'pwm/for-5.19-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/thierry.reding/linux-pwm: (43 commits)
  pwm: pwm-cros-ec: Add channel type support
  dt-bindings: google,cros-ec-pwm: Add the new -type compatible
  dt-bindings: Add mfd/cros_ec definitions
  pwm: Document that the pinstate of a disabled PWM isn't reliable
  pwm: twl-led: Implement .apply() callback
  pwm: lpc18xx: Implement .apply() callback
  pwm: mediatek: Implement .apply() callback
  pwm: lpc32xx: Implement .apply() callback
  pwm: tegra: Implement .apply() callback
  pwm: stmpe: Implement .apply() callback
  pwm: sti: Implement .apply() callback
  pwm: pwm-mediatek: Add support for MediaTek Helio X10 MT6795
  dt-bindings: pwm: pwm-mediatek: Add documentation for MT6795 SoC
  pwm: tegra: Optimize period calculation
  pwm: renesas-tpu: Improve precision of period and duty_cycle calculation
  pwm: renesas-tpu: Improve maths to compute register settings
  pwm: renesas-tpu: Rename variables to match the usual naming
  pwm: renesas-tpu: Implement .apply() callback
  pwm: renesas-tpu: Make use of devm functions
  pwm: renesas-tpu: Make use of dev_err_probe()
  ...
parents 68e6134b 3d593b6e
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
# Copyright (C) 2022 Microchip Technology, Inc. and its subsidiaries
%YAML 1.2
---
$id: http://devicetree.org/schemas/pwm/atmel,at91sam-pwm.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Atmel/Microchip PWM controller

maintainers:
  - Claudiu Beznea <claudiu.beznea@microchip.com>

allOf:
  - $ref: "pwm.yaml#"

properties:
  compatible:
    oneOf:
      - items:
          - enum:
              - atmel,at91sam9rl-pwm
              - atmel,sama5d3-pwm
              - atmel,sama5d2-pwm
              - microchip,sam9x60-pwm
      - items:
          - const: microchip,sama7g5-pwm
          - const: atmel,sama5d2-pwm

  reg:
    maxItems: 1

  "#pwm-cells":
    const: 3

required:
  - compatible
  - reg

unevaluatedProperties: false

examples:
  - |
    pwm0: pwm@f8034000 {
        compatible = "atmel,at91sam9rl-pwm";
        reg = <0xf8034000 0x400>;
        #pwm-cells = <3>;
    };
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Atmel PWM controller

Required properties:
  - compatible: should be one of:
    - "atmel,at91sam9rl-pwm"
    - "atmel,sama5d3-pwm"
    - "atmel,sama5d2-pwm"
    - "microchip,sam9x60-pwm"
  - reg: physical base address and length of the controller's registers
  - #pwm-cells: Should be 3. See pwm.yaml in this directory for a
    description of the cells format.

Example:

	pwm0: pwm@f8034000 {
		compatible = "atmel,at91sam9rl-pwm";
		reg = <0xf8034000 0x400>;
		#pwm-cells = <3>;
	};

	pwmleds {
		compatible = "pwm-leds";

		d1 {
			label = "d1";
			pwms = <&pwm0 3 5000 0>
			max-brightness = <255>;
		};

		d2 {
			label = "d2";
			pwms = <&pwm0 1 5000 1>
			max-brightness = <255>;
		};
	};
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@@ -21,7 +21,14 @@ allOf:

properties:
  compatible:
    const: google,cros-ec-pwm
    oneOf:
      - description: PWM controlled using EC_PWM_TYPE_GENERIC channels.
        items:
          - const: google,cros-ec-pwm
      - description: PWM controlled using CROS_EC_PWM_DT_<...> types.
        items:
          - const: google,cros-ec-pwm-type

  "#pwm-cells":
    description: The cell specifies the PWM index.
    const: 1
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/pwm/mediatek,pwm-disp.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: MediaTek DISP_PWM Controller Device Tree Bindings

maintainers:
  - Jitao Shi <jitao.shi@mediatek.com>
  - Xinlei Lee <xinlei.lee@mediatek.com>

allOf:
  - $ref: pwm.yaml#

properties:
  compatible:
    oneOf:
      - enum:
          - mediatek,mt2701-disp-pwm
          - mediatek,mt6595-disp-pwm
          - mediatek,mt8173-disp-pwm
          - mediatek,mt8183-disp-pwm
      - items:
          - const: mediatek,mt8167-disp-pwm
          - const: mediatek,mt8173-disp-pwm
      - items:
          - enum:
              - mediatek,mt8186-disp-pwm
              - mediatek,mt8192-disp-pwm
              - mediatek,mt8195-disp-pwm
          - const: mediatek,mt8183-disp-pwm

  reg:
    maxItems: 1

  "#pwm-cells":
    const: 2

  interrupts:
    maxItems: 1

  clocks:
    items:
      - description: Main Clock
      - description: Mm Clock

  clock-names:
    items:
      - const: main
      - const: mm

required:
  - compatible
  - reg
  - "#pwm-cells"
  - clocks
  - clock-names

additionalProperties: false

examples:
  - |
    #include <dt-bindings/interrupt-controller/arm-gic.h>
    #include <dt-bindings/clock/mt8173-clk.h>
    #include <dt-bindings/interrupt-controller/irq.h>

    pwm0: pwm@1401e000 {
        compatible = "mediatek,mt8173-disp-pwm";
        reg = <0x1401e000 0x1000>;
        #pwm-cells = <2>;
        clocks = <&mmsys CLK_MM_DISP_PWM026M>,
                 <&mmsys CLK_MM_DISP_PWM0MM>;
        clock-names = "main", "mm";
    };
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@@ -3,6 +3,7 @@ MediaTek PWM controller
Required properties:
 - compatible: should be "mediatek,<name>-pwm":
   - "mediatek,mt2712-pwm": found on mt2712 SoC.
   - "mediatek,mt6795-pwm": found on mt6795 SoC.
   - "mediatek,mt7622-pwm": found on mt7622 SoC.
   - "mediatek,mt7623-pwm": found on mt7623 SoC.
   - "mediatek,mt7628-pwm": found on mt7628 SoC.
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