Commit 8e7291d6 authored by Thomas Bogendoerfer's avatar Thomas Bogendoerfer
Browse files

MIPS: Get rid of CAVIUM_OCTEON_DCACHE_PREFETCH_WAR 



CAVIUM_OCTEON_DCACHE_PREFETCH_WAR is a check for Octeon model CN6XXXX.
By using the version check we can remove the define.

Signed-off-by: default avatarThomas Bogendoerfer <tsbogend@alpha.franken.de>
parent ab574307

arch/mips/cavium-octeon/setup.c

+1 −1
Original line number Diff line number Diff line
@@ -1126,7 +1126,7 @@ EXPORT_SYMBOL(prom_putchar); 


void __init prom_free_prom_memory(void)

{

	if (CAVIUM_OCTEON_DCACHE_PREFETCH_WAR) {

	if (OCTEON_IS_MODEL(OCTEON_CN6XXX)) {

		/* Check for presence of Core-14449 fix.  */

		u32 insn;

		u32 *foo;

arch/mips/include/asm/mach-cavium-octeon/war.h

+0 −3
Original line number Diff line number Diff line
@@ -9,7 +9,4 @@ 
#ifndef __ASM_MIPS_MACH_CAVIUM_OCTEON_WAR_H

#define __ASM_MIPS_MACH_CAVIUM_OCTEON_WAR_H



#define CAVIUM_OCTEON_DCACHE_PREFETCH_WAR	\

	OCTEON_IS_MODEL(OCTEON_CN6XXX)



#endif /* __ASM_MIPS_MACH_CAVIUM_OCTEON_WAR_H */

arch/mips/mm/uasm.c

+1 −1
Original line number Diff line number Diff line
@@ -394,7 +394,7 @@ I_u2u1u3(_lddir) 
void uasm_i_pref(u32 **buf, unsigned int a, signed int b,

			    unsigned int c)

{

	if (CAVIUM_OCTEON_DCACHE_PREFETCH_WAR && a <= 24 && a != 5)

	if (OCTEON_IS_MODEL(OCTEON_CN6XXX) && a <= 24 && a != 5)

		/*

		 * As per erratum Core-14449, replace prefetches 0-4,

		 * 6-24 with 'pref 28'.