Commit 8e6958c8 authored by Marc Zyngier's avatar Marc Zyngier
Browse files

Merge branch irq/misc-5.18 into irq/irqchip-next 



* irq/misc-5.18:
  : .
  : Misc irq chip changes for 5.18
  :
  : - GICv3: Relax ordering of previous stores to only include the ISH domain
  :
  : - nvic: Unmap MMIo region on probe failure
  :
  : - xilinx: Switch to GENERIC_IRQ_MULTI_HANDLER when used on microblaze
  : .
  irqchip/xilinx: Switch to GENERIC_IRQ_MULTI_HANDLER
  irqchip/nvic: Release nvic_base upon failure
  irqchip/gic-v3: Use dsb(ishst) to order writes with ICC_SGI1R_EL1 accesses

Signed-off-by: default avatarMarc Zyngier <maz@kernel.org>
parents 92877b9e 1e364921

arch/microblaze/Kconfig

+2 −0
Original line number Diff line number Diff line
@@ -45,6 +45,8 @@ config MICROBLAZE 
	select SET_FS

	select ZONE_DMA

	select TRACE_IRQFLAGS_SUPPORT

	select GENERIC_IRQ_MULTI_HANDLER

	select HANDLE_DOMAIN_IRQ



# Endianness selection

choice

arch/microblaze/include/asm/irq.h

+0 −3
Original line number Diff line number Diff line
@@ -11,7 +11,4 @@ 
struct pt_regs;

extern void do_IRQ(struct pt_regs *regs);



/* should be defined in each interrupt controller driver */

extern unsigned int xintc_get_irq(void);



#endif /* _ASM_MICROBLAZE_IRQ_H */

arch/microblaze/kernel/irq.c

+1 −15
Original line number Diff line number Diff line
@@ -20,27 +20,13 @@ 
#include <linux/irqchip.h>

#include <linux/of_irq.h>



static u32 concurrent_irq;



void __irq_entry do_IRQ(struct pt_regs *regs)

{

	unsigned int irq;

	struct pt_regs *old_regs = set_irq_regs(regs);

	trace_hardirqs_off();



	irq_enter();

	irq = xintc_get_irq();

next_irq:

	BUG_ON(!irq);

	generic_handle_irq(irq);



	irq = xintc_get_irq();

	if (irq != -1U) {

		pr_debug("next irq: %d\n", irq);

		++concurrent_irq;

		goto next_irq;

	}



	handle_arch_irq(regs);

	irq_exit();

	set_irq_regs(old_regs);

	trace_hardirqs_on();

drivers/irqchip/irq-gic-v3.c

+1 −1
Original line number Diff line number Diff line
@@ -1211,7 +1211,7 @@ static void gic_ipi_send_mask(struct irq_data *d, const struct cpumask *mask) 
	 * Ensure that stores to Normal memory are visible to the

	 * other CPUs before issuing the IPI.

	 */

	wmb();

	dsb(ishst);



	for_each_cpu(cpu, mask) {

		u64 cluster_id = MPIDR_TO_SGI_CLUSTER_ID(cpu_logical_map(cpu));

drivers/irqchip/irq-nvic.c

+2 −0
Original line number Diff line number Diff line
@@ -107,6 +107,7 @@ static int __init nvic_of_init(struct device_node *node, 


	if (!nvic_irq_domain) {

		pr_warn("Failed to allocate irq domain\n");

		iounmap(nvic_base);

		return -ENOMEM;

	}
@@ -116,6 +117,7 @@ static int __init nvic_of_init(struct device_node *node, 
	if (ret) {

		pr_warn("Failed to allocate irq chips\n");

		irq_domain_remove(nvic_irq_domain);

		iounmap(nvic_base);

		return ret;

	}