Commit 8e4d7a78 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'x86-cleanups-2021-06-28' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip 

Pull x86 cleanups from Ingo Molnar:
 "Misc cleanups & removal of obsolete code"

* tag 'x86-cleanups-2021-06-28' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  x86/sgx: Correct kernel-doc's arg name in sgx_encl_release()
  doc: Remove references to IBM Calgary
  x86/setup: Document that Windows reserves the first MiB
  x86/crash: Remove crash_reserve_low_1M()
  x86/setup: Remove CONFIG_X86_RESERVE_LOW and reservelow= options
  x86/alternative: Align insn bytes vertically
  x86: Fix leftover comment typos
  x86/asm: Simplify __smp_mb() definition
  x86/alternatives: Make the x86nops[] symbol static
parents 98e62da8 1d315639

Documentation/admin-guide/kernel-parameters.txt

+0 −5
Original line number Diff line number Diff line
@@ -4775,11 +4775,6 @@ 
			Reserves a hole at the top of the kernel virtual

			address space.



	reservelow=	[X86]

			Format: nn[K]

			Set the amount of memory to reserve for BIOS at

			the bottom of the address space.



	reset_devices	[KNL] Force drivers to reset the underlying device

			during initialization.

Documentation/x86/x86_64/boot-options.rst

+1 −30
Original line number Diff line number Diff line
@@ -247,16 +247,11 @@ Multiple x86-64 PCI-DMA mapping implementations exist, for example: 
      Kernel boot message: "PCI-DMA: Using software bounce buffering

      for IO (SWIOTLB)"



   4. <arch/x86_64/pci-calgary.c> : IBM Calgary hardware IOMMU. Used in IBM

      pSeries and xSeries servers. This hardware IOMMU supports DMA address

      mapping with memory protection, etc.

      Kernel boot message: "PCI-DMA: Using Calgary IOMMU"



::



  iommu=[<size>][,noagp][,off][,force][,noforce]

  [,memaper[=<order>]][,merge][,fullflush][,nomerge]

  [,noaperture][,calgary]

  [,noaperture]



General iommu options:
@@ -295,8 +290,6 @@ iommu options only relevant to the AMD GART hardware IOMMU: 
      Don't initialize the AGP driver and use full aperture.

    panic

      Always panic when IOMMU overflows.

    calgary

      Use the Calgary IOMMU if it is available



iommu options only relevant to the software bounce buffering (SWIOTLB) IOMMU

implementation:
@@ -307,28 +300,6 @@ implementation: 
      force

        Force all IO through the software TLB.



Settings for the IBM Calgary hardware IOMMU currently found in IBM

pSeries and xSeries machines



    calgary=[64k,128k,256k,512k,1M,2M,4M,8M]

      Set the size of each PCI slot's translation table when using the

      Calgary IOMMU. This is the size of the translation table itself

      in main memory. The smallest table, 64k, covers an IO space of

      32MB; the largest, 8MB table, can cover an IO space of 4GB.

      Normally the kernel will make the right choice by itself.

    calgary=[translate_empty_slots]

      Enable translation even on slots that have no devices attached to

      them, in case a device will be hotplugged in the future.

    calgary=[disable=<PCI bus number>]

      Disable translation on a given PHB. For

      example, the built-in graphics adapter resides on the first bridge

      (PCI bus number 0); if translation (isolation) is enabled on this

      bridge, X servers that access the hardware directly from user

      space might stop working. Use this option if you have devices that

      are accessed from userspace directly on some PCI host bridge.

    panic

      Always panic when IOMMU overflows





Miscellaneous

=============

arch/x86/Kconfig

+0 −29
Original line number Diff line number Diff line
@@ -1693,35 +1693,6 @@ config X86_BOOTPARAM_MEMORY_CORRUPTION_CHECK 
	  Set whether the default state of memory_corruption_check is

	  on or off.



config X86_RESERVE_LOW

	int "Amount of low memory, in kilobytes, to reserve for the BIOS"

	default 64

	range 4 640

	help

	  Specify the amount of low memory to reserve for the BIOS.



	  The first page contains BIOS data structures that the kernel

	  must not use, so that page must always be reserved.



	  By default we reserve the first 64K of physical RAM, as a

	  number of BIOSes are known to corrupt that memory range

	  during events such as suspend/resume or monitor cable

	  insertion, so it must not be used by the kernel.



	  You can set this to 4 if you are absolutely sure that you

	  trust the BIOS to get all its memory reservations and usages

	  right.  If you know your BIOS have problems beyond the

	  default 64K area, you can set this to 640 to avoid using the

	  entire low memory range.



	  If you have doubts about the BIOS (e.g. suspend/resume does

	  not work or there's kernel crashes after certain hardware

	  hotplug events) then you might want to enable

	  X86_CHECK_BIOS_CORRUPTION=y to allow the kernel to check

	  typical corruption patterns.



	  Leave this to the default value of 64 if you are unsure.



config MATH_EMULATION

	bool

	depends on MODIFY_LDT_SYSCALL

arch/x86/hyperv/hv_init.c

+1 −1
Original line number Diff line number Diff line
@@ -623,7 +623,7 @@ bool hv_query_ext_cap(u64 cap_query) 
	 * output parameter to the hypercall below and so it should be

	 * compatible with 'virt_to_phys'. Which means, it's address should be

	 * directly mapped. Use 'static' to keep it compatible; stack variables

	 * can be virtually mapped, making them imcompatible with

	 * can be virtually mapped, making them incompatible with

	 * 'virt_to_phys'.

	 * Hypercall input/output addresses should also be 8-byte aligned.

	 */

arch/x86/include/asm/barrier.h

+2 −5
Original line number Diff line number Diff line
@@ -54,11 +54,8 @@ static inline unsigned long array_index_mask_nospec(unsigned long index, 
#define dma_rmb()	barrier()

#define dma_wmb()	barrier()



#ifdef CONFIG_X86_32

#define __smp_mb()	asm volatile("lock; addl $0,-4(%%esp)" ::: "memory", "cc")

#else

#define __smp_mb()	asm volatile("lock; addl $0,-4(%%rsp)" ::: "memory", "cc")

#endif

#define __smp_mb()	asm volatile("lock; addl $0,-4(%%" _ASM_SP ")" ::: "memory", "cc")



#define __smp_rmb()	dma_rmb()

#define __smp_wmb()	barrier()

#define __smp_store_mb(var, value) do { (void)xchg(&var, value); } while (0)