Loading drivers/usb/dwc3/core.h +9 −0 Original line number Diff line number Diff line Loading @@ -202,6 +202,15 @@ #define DWC3_DCTL_APPL1RES (1 << 23) #define DWC3_DCTL_TRGTULST_MASK (0x0f << 17) #define DWC3_DCTL_TRGTULST(n) ((n) << 17) #define DWC3_DCTL_TRGTULST_U2 (DWC3_DCTL_TRGTULST(2)) #define DWC3_DCTL_TRGTULST_U3 (DWC3_DCTL_TRGTULST(3)) #define DWC3_DCTL_TRGTULST_SS_DIS (DWC3_DCTL_TRGTULST(4)) #define DWC3_DCTL_TRGTULST_RX_DET (DWC3_DCTL_TRGTULST(5)) #define DWC3_DCTL_TRGTULST_SS_INACT (DWC3_DCTL_TRGTULST(6)) #define DWC3_DCTL_INITU2ENA (1 << 12) #define DWC3_DCTL_ACCEPTU2ENA (1 << 11) #define DWC3_DCTL_INITU1ENA (1 << 10) Loading drivers/usb/dwc3/gadget.c +6 −3 Original line number Diff line number Diff line Loading @@ -1313,10 +1313,13 @@ static void dwc3_gadget_run_stop(struct dwc3 *dwc, int is_on) u32 timeout = 500; reg = dwc3_readl(dwc->regs, DWC3_DCTL); if (is_on) reg |= DWC3_DCTL_RUN_STOP; else if (is_on) { reg &= ~DWC3_DCTL_TRGTULST_MASK; reg |= (DWC3_DCTL_RUN_STOP | DWC3_DCTL_TRGTULST_RX_DET); } else { reg &= ~DWC3_DCTL_RUN_STOP; } dwc3_writel(dwc->regs, DWC3_DCTL, reg); Loading Loading
drivers/usb/dwc3/core.h +9 −0 Original line number Diff line number Diff line Loading @@ -202,6 +202,15 @@ #define DWC3_DCTL_APPL1RES (1 << 23) #define DWC3_DCTL_TRGTULST_MASK (0x0f << 17) #define DWC3_DCTL_TRGTULST(n) ((n) << 17) #define DWC3_DCTL_TRGTULST_U2 (DWC3_DCTL_TRGTULST(2)) #define DWC3_DCTL_TRGTULST_U3 (DWC3_DCTL_TRGTULST(3)) #define DWC3_DCTL_TRGTULST_SS_DIS (DWC3_DCTL_TRGTULST(4)) #define DWC3_DCTL_TRGTULST_RX_DET (DWC3_DCTL_TRGTULST(5)) #define DWC3_DCTL_TRGTULST_SS_INACT (DWC3_DCTL_TRGTULST(6)) #define DWC3_DCTL_INITU2ENA (1 << 12) #define DWC3_DCTL_ACCEPTU2ENA (1 << 11) #define DWC3_DCTL_INITU1ENA (1 << 10) Loading
drivers/usb/dwc3/gadget.c +6 −3 Original line number Diff line number Diff line Loading @@ -1313,10 +1313,13 @@ static void dwc3_gadget_run_stop(struct dwc3 *dwc, int is_on) u32 timeout = 500; reg = dwc3_readl(dwc->regs, DWC3_DCTL); if (is_on) reg |= DWC3_DCTL_RUN_STOP; else if (is_on) { reg &= ~DWC3_DCTL_TRGTULST_MASK; reg |= (DWC3_DCTL_RUN_STOP | DWC3_DCTL_TRGTULST_RX_DET); } else { reg &= ~DWC3_DCTL_RUN_STOP; } dwc3_writel(dwc->regs, DWC3_DCTL, reg); Loading