Unverified Commit 8db76cfa authored by Sai Krishna Potthuri's avatar Sai Krishna Potthuri Committed by Mark Brown
Browse files

dt-bindings: spi: cadence-quadspi: Add support for Xilinx Versal OSPI 



Add new compatible to support Cadence Octal SPI(OSPI) controller on
Xilinx Versal SoCs, also add power-domains property to the properties
list and marked as required for Xilinx Versal OSPI compatible.

Signed-off-by: default avatarSai Krishna Potthuri <lakshmi.sai.krishna.potthuri@xilinx.com>
Link: https://lore.kernel.org/r/1632478031-12242-3-git-send-email-lakshmi.sai.krishna.potthuri@xilinx.com


Signed-off-by: default avatarMark Brown <broonie@kernel.org>
parent 74e78adc

Documentation/devicetree/bindings/spi/cdns,qspi-nor.yaml

+12 −0
Original line number Diff line number Diff line
@@ -11,6 +11,14 @@ maintainers: 


allOf:

  - $ref: spi-controller.yaml#

  - if:

      properties:

        compatible:

          contains:

            const: xlnx,versal-ospi-1.0

    then:

      required:

        - power-domains



properties:

  compatible:
@@ -20,6 +28,7 @@ properties: 
              - ti,k2g-qspi

              - ti,am654-ospi

              - intel,lgm-qspi

              - xlnx,versal-ospi-1.0

          - const: cdns,qspi-nor

      - const: cdns,qspi-nor
@@ -65,6 +74,9 @@ properties: 
      data rather than the QSPI clock. Make sure that QSPI return clock

      is populated on the board before using this property.



  power-domains:

    maxItems: 1



  resets:

    maxItems: 2