Commit 8db1015b authored by shaoyunl's avatar shaoyunl Committed by Alex Deucher
Browse files

drm/amdgpu/sriov : Use kiq to do tlb invalidation for gfx10 on sriov 



On SRIOV run time, driver shouldn't directly access invalidation registers through MMIO.
Use kiq to submit wait_reg_mem package for the invalidation

Signed-off-by: default avatarshaoyunl <shaoyun.liu@amd.com>
Reviewed-by: default avatarChristian König <christian.koenig@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 80c36f86

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

+3 −0
Original line number Diff line number Diff line
@@ -3480,6 +3480,9 @@ static void gfx_v10_0_check_fw_write_wait(struct amdgpu_device *adev) 
		    (adev->gfx.mec_feature_version >= 27))

			adev->gfx.cp_fw_write_wait = true;

		break;

	case CHIP_SIENNA_CICHLID:

		adev->gfx.cp_fw_write_wait = true;

		break;

	default:

		break;

	}

drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c

+18 −0
Original line number Diff line number Diff line
@@ -350,6 +350,24 @@ static void gmc_v10_0_flush_gpu_tlb(struct amdgpu_device *adev, uint32_t vmid, 
	/* flush hdp cache */

	adev->nbio.funcs->hdp_flush(adev, NULL);



	/* For SRIOV run time, driver shouldn't access the register through MMIO

	 * Directly use kiq to do the vm invalidation instead

	 */

	if (adev->gfx.kiq.ring.sched.ready &&

	    (amdgpu_sriov_runtime(adev) || !amdgpu_sriov_vf(adev)) &&

	    !adev->in_gpu_reset) {



		struct amdgpu_vmhub *hub = &adev->vmhub[vmhub];

		const unsigned eng = 17;

		u32 inv_req = gmc_v10_0_get_invalidate_req(vmid, flush_type);

		u32 req = hub->vm_inv_eng0_req + eng;

		u32 ack = hub->vm_inv_eng0_ack + eng;



		amdgpu_virt_kiq_reg_write_reg_wait(adev, req, ack, inv_req,

				1 << vmid);

		return;

	}



	mutex_lock(&adev->mman.gtt_window_lock);



	if (vmhub == AMDGPU_MMHUB_0) {