Commit 8daecf61 authored by Dave Airlie's avatar Dave Airlie
Browse files

Merge tag 'drm/tegra/for-5.20-rc1' of https://gitlab.freedesktop.org/drm/tegra into drm-next 



drm/tegra: Changes for v5.20-rc1

The bulk of these changes adds support for context isolation for the
various supported host1x engines, as well as support for the hardware
found on the new Tegra234 SoC generation.

There's also a couple of fixes and cleanups. To round things off, the
device tree bindings are converted to the new json-schema format that
allows DTBs to be validated.

Signed-off-by: default avatarDave Airlie <airlied@redhat.com>

From: Thierry Reding <thierry.reding@gmail.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220708181136.673789-1-thierry.reding@gmail.com
parents b45b4f88 135f4c55

Documentation/devicetree/bindings/display/tegra/nvidia,tegra114-mipi.txt

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NVIDIA Tegra MIPI pad calibration controller



Required properties:

- compatible: "nvidia,tegra<chip>-mipi"

- reg: Physical base address and length of the controller's registers.

- clocks: Must contain an entry for each entry in clock-names.

  See ../clocks/clock-bindings.txt for details.

- clock-names: Must include the following entries:

  - mipi-cal

- #nvidia,mipi-calibrate-cells: Should be 1. The cell is a bitmask of the pads

  that need to be calibrated for a given device.



User nodes need to contain an nvidia,mipi-calibrate property that has a

phandle to refer to the calibration controller node and a bitmask of the pads

that need to be calibrated.



Example:



	mipi: mipi@700e3000 {

		compatible = "nvidia,tegra114-mipi";

		reg = <0x700e3000 0x100>;

		clocks = <&tegra_car TEGRA114_CLK_MIPI_CAL>;

		clock-names = "mipi-cal";

		#nvidia,mipi-calibrate-cells = <1>;

	};



	...



	host1x@50000000 {

		...



		dsi@54300000 {

			...



			nvidia,mipi-calibrate = <&mipi 0x060>;



			...

		};



		...

	};

Documentation/devicetree/bindings/display/tegra/nvidia,tegra114-mipi.yaml

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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)

%YAML 1.2

---

$id: http://devicetree.org/schemas/display/tegra/nvidia,tegra114-mipi.yaml#

$schema: http://devicetree.org/meta-schemas/core.yaml#



title: NVIDIA Tegra MIPI pad calibration controller



maintainers:

  - Thierry Reding <thierry.reding@gmail.com>

  - Jon Hunter <jonathanh@nvidia.com>



properties:

  $nodename:

    pattern: "^mipi@[0-9a-f]+$"



  compatible:

    enum:

      - nvidia,tegra114-mipi

      - nvidia,tegra210-mipi

      - nvidia,tegra186-mipi



  reg:

    maxItems: 1



  clocks:

    items:

      - description: module clock



  clock-names:

    items:

      - const: mipi-cal



  power-domains:

    maxItems: 1



  "#nvidia,mipi-calibrate-cells":

    description: The number of cells in a MIPI calibration specifier.

      Should be 1. The single cell specifies a bitmask of the pads that

      need to be calibrated for a given device.

    $ref: "/schemas/types.yaml#/definitions/uint32"

    const: 1



additionalProperties: false



required:

  - compatible

  - reg

  - clocks

  - "#nvidia,mipi-calibrate-cells"



examples:

  - |

    #include <dt-bindings/clock/tegra114-car.h>



    mipi@700e3000 {

        compatible = "nvidia,tegra114-mipi";

        reg = <0x700e3000 0x100>;

        clocks = <&tegra_car TEGRA114_CLK_MIPI_CAL>;

        clock-names = "mipi-cal";

        #nvidia,mipi-calibrate-cells = <1>;

    };



    dsia: dsi@54300000 {

        compatible = "nvidia,tegra114-dsi";

        reg = <0x54300000 0x00040000>;

        clocks = <&tegra_car TEGRA114_CLK_DSIA>,

                 <&tegra_car TEGRA114_CLK_DSIALP>,

                 <&tegra_car TEGRA114_CLK_PLL_D_OUT0>;

        clock-names = "dsi", "lp", "parent";

        resets = <&tegra_car 48>;

        reset-names = "dsi";

        nvidia,mipi-calibrate = <&mipi 0x060>; /* DSIA & DSIB pads */

    };

Documentation/devicetree/bindings/display/tegra/nvidia,tegra124-dpaux.yaml

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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)

%YAML 1.2

---

$id: http://devicetree.org/schemas/display/tegra/nvidia,tegra124-dpaux.yaml#

$schema: http://devicetree.org/meta-schemas/core.yaml#



title: NVIDIA Tegra DisplayPort AUX Interface



maintainers:

  - Thierry Reding <thierry.reding@gmail.com>

  - Jon Hunter <jonathanh@nvidia.com>



description: |

  The Tegra Display Port Auxiliary (DPAUX) pad controller manages two

  pins which can be assigned to either the DPAUX channel or to an I2C

  controller.



  When configured for DisplayPort AUX operation, the DPAUX controller

  can also be used to communicate with a DisplayPort device using the

  AUX channel.



properties:

  $nodename:

    pattern: "^dpaux@[0-9a-f]+$"



  compatible:

    oneOf:

      - enum:

          - nvidia,tegra124-dpaux

          - nvidia,tegra210-dpaux

          - nvidia,tegra186-dpaux

          - nvidia,tegra194-dpaux



      - items:

          - const: nvidia,tegra132-dpaux

          - const: nvidia,tegra124-dpaux



  reg:

    maxItems: 1



  interrupts:

    maxItems: 1



  clocks:

    items:

      - description: clock input for the DPAUX hardware

      - description: reference clock



  clock-names:

    items:

      - const: dpaux

      - const: parent



  resets:

    items:

      - description: module reset



  reset-names:

    items:

      - const: dpaux



  power-domains:

    maxItems: 1



  i2c-bus:

    description: Subnode where I2C slave devices are listed. This

      subnode must be always present. If there are no I2C slave

      devices, an empty node should be added. See ../../i2c/i2c.yaml

      for more information.

    type: object



  aux-bus:

    $ref: /schemas/display/dp-aux-bus.yaml#



  vdd-supply:

    description: phandle of a supply that powers the DisplayPort

      link



patternProperties:

  "^pinmux-[a-z0-9]+$":

    description:

      Since only three configurations are possible, only three child

      nodes are needed to describe the pin mux'ing options for the

      DPAUX pads. Furthermore, given that the pad functions are only

      applicable to a single set of pads, the child nodes only need

      to describe the pad group the functions are being applied to

      rather than the individual pads.

    type: object

    properties:

      groups:

        const: dpaux-io



      function:

        enum:

          - aux

          - i2c

          - off



    additionalProperties: false



    required:

      - groups

      - function



additionalProperties: false



required:

  - compatible

  - reg

  - interrupts

  - clocks

  - clock-names

  - resets

  - reset-names



examples:

  - |

    #include <dt-bindings/clock/tegra210-car.h>

    #include <dt-bindings/interrupt-controller/arm-gic.h>



    dpaux: dpaux@545c0000 {

        compatible = "nvidia,tegra210-dpaux";

        reg = <0x545c0000 0x00040000>;

        interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>;

        clocks = <&tegra_car TEGRA210_CLK_DPAUX>,

                 <&tegra_car TEGRA210_CLK_PLL_DP>;

        clock-names = "dpaux", "parent";

        resets = <&tegra_car 181>;

        reset-names = "dpaux";

        power-domains = <&pd_sor>;

        status = "disabled";



        state_dpaux_aux: pinmux-aux {

            groups = "dpaux-io";

            function = "aux";

        };



        state_dpaux_i2c: pinmux-i2c {

            groups = "dpaux-io";

            function = "i2c";

        };



        state_dpaux_off: pinmux-off {

            groups = "dpaux-io";

            function = "off";

        };



        i2c-bus {

            #address-cells = <1>;

            #size-cells = <0>;

        };

    };

Documentation/devicetree/bindings/display/tegra/nvidia,tegra124-sor.yaml

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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)

%YAML 1.2

---

$id: http://devicetree.org/schemas/display/tegra/nvidia,tegra124-sor.yaml#

$schema: http://devicetree.org/meta-schemas/core.yaml#



title: NVIDIA Tegra SOR Output Encoder



maintainers:

  - Thierry Reding <thierry.reding@gmail.com>

  - Jon Hunter <jonathanh@nvidia.com>



description: |

  The Serial Output Resource (SOR) can be used to drive HDMI, LVDS, eDP

  and DP outputs.



properties:

  $nodename:

    pattern: "^sor@[0-9a-f]+$"



  compatible:

    oneOf:

      - enum:

          - nvidia,tegra124-sor

          - nvidia,tegra210-sor

          - nvidia,tegra210-sor1

          - nvidia,tegra186-sor

          - nvidia,tegra186-sor1

          - nvidia,tegra194-sor



      - items:

          - const: nvidia,tegra132-sor

          - const: nvidia,tegra124-sor



  reg:

    maxItems: 1



  interrupts:

    maxItems: 1



  clocks:

    minItems: 5

    maxItems: 6



  clock-names:

    minItems: 5

    maxItems: 6



  resets:

    items:

      - description: module reset



  reset-names:

    items:

      - const: sor



  power-domains:

    maxItems: 1



  avdd-io-hdmi-dp-supply:

    description: I/O supply for HDMI/DP



  vdd-hdmi-dp-pll-supply:

    description: PLL supply for HDMI/DP



  hdmi-supply:

    description: +5.0V HDMI connector supply, required for HDMI



  # Tegra186 and later

  nvidia,interface:

    description: index of the SOR interface

    $ref: "/schemas/types.yaml#/definitions/uint32"



  nvidia,ddc-i2c-bus:

    description: phandle of an I2C controller used for DDC EDID

      probing

    $ref: "/schemas/types.yaml#/definitions/phandle"



  nvidia,hpd-gpio:

    description: specifies a GPIO used for hotplug detection

    maxItems: 1



  nvidia,edid:

    description: supplies a binary EDID blob

    $ref: "/schemas/types.yaml#/definitions/uint8-array"



  nvidia,panel:

    description: phandle of a display panel, required for eDP

    $ref: "/schemas/types.yaml#/definitions/phandle"



  nvidia,xbar-cfg:

    description: 5 cells containing the crossbar configuration.

      Each lane of the SOR, identified by the cell's index, is

      mapped via the crossbar to the pad specified by the cell's

      value.

    $ref: "/schemas/types.yaml#/definitions/uint32-array"



  # optional when driving an eDP output

  nvidia,dpaux:

    description: phandle to a DispayPort AUX interface

    $ref: "/schemas/types.yaml#/definitions/phandle"



allOf:

  - if:

      properties:

        compatible:

          contains:

            enum:

              - nvidia,tegra186-sor

              - nvidia,tegra194-sor

    then:

      properties:

        clocks:

          items:

            - description: clock input for the SOR hardware

            - description: SOR output clock

            - description: input for the pixel clock

            - description: reference clock for the SOR clock

            - description: safe reference clock for the SOR clock

                during power up

            - description: SOR pad output clock



        clock-names:

          items:

            - const: sor

            - enum:

                - source # deprecated

                - out

            - const: parent

            - const: dp

            - const: safe

            - const: pad

    else:

      properties:

        clocks:

          items:

            - description: clock input for the SOR hardware

            - description: SOR output clock

            - description: input for the pixel clock

            - description: reference clock for the SOR clock

            - description: safe reference clock for the SOR clock

                during power up



        clock-names:

          items:

            - const: sor

            - enum:

                - source # deprecated

                - out

            - const: parent

            - const: dp

            - const: safe



additionalProperties: false



required:

  - compatible

  - reg

  - interrupts

  - clocks

  - clock-names

  - resets

  - reset-names

  - avdd-io-hdmi-dp-supply

  - vdd-hdmi-dp-pll-supply



examples:

  - |

    #include <dt-bindings/clock/tegra210-car.h>

    #include <dt-bindings/gpio/tegra-gpio.h>

    #include <dt-bindings/interrupt-controller/arm-gic.h>



    sor0: sor@54540000 {

        compatible = "nvidia,tegra210-sor";

        reg = <0x54540000 0x00040000>;

        interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;

        clocks = <&tegra_car TEGRA210_CLK_SOR0>,

                 <&tegra_car TEGRA210_CLK_SOR0_OUT>,

                 <&tegra_car TEGRA210_CLK_PLL_D_OUT0>,

                 <&tegra_car TEGRA210_CLK_PLL_DP>,

                 <&tegra_car TEGRA210_CLK_SOR_SAFE>;

        clock-names = "sor", "out", "parent", "dp", "safe";

        resets = <&tegra_car 182>;

        reset-names = "sor";

        pinctrl-0 = <&state_dpaux_aux>;

        pinctrl-1 = <&state_dpaux_i2c>;

        pinctrl-2 = <&state_dpaux_off>;

        pinctrl-names = "aux", "i2c", "off";

        power-domains = <&pd_sor>;



        avdd-io-hdmi-dp-supply = <&avdd_1v05>;

        vdd-hdmi-dp-pll-supply = <&vdd_1v8>;

        hdmi-supply = <&vdd_hdmi>;



        nvidia,ddc-i2c-bus = <&hdmi_ddc>;

        nvidia,hpd-gpio = <&gpio TEGRA_GPIO(CC, 1) GPIO_ACTIVE_LOW>;

    };

Documentation/devicetree/bindings/display/tegra/nvidia,tegra124-vic.yaml

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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)

%YAML 1.2

---

$id: http://devicetree.org/schemas/display/tegra/nvidia,tegra124-vic.yaml#

$schema: http://devicetree.org/meta-schemas/core.yaml#



title: NVIDIA Tegra Video Image Composer



maintainers:

  - Thierry Reding <thierry.reding@gmail.com>

  - Jon Hunter <jonathanh@nvidia.com>



properties:

  $nodename:

    pattern: "^vic@[0-9a-f]+$"



  compatible:

    oneOf:

      - enum:

          - nvidia,tegra124-vic

          - nvidia,tegra210-vic

          - nvidia,tegra186-vic

          - nvidia,tegra194-vic

          - nvidia,tegra234-vic



      - items:

          - const: nvidia,tegra132-vic

          - const: nvidia,tegra124-vic



  reg:

    maxItems: 1



  interrupts:

    maxItems: 1



  clocks:

    items:

      - description: clock input for the VIC hardware



  clock-names:

    items:

      - const: vic



  resets:

    items:

      - description: module reset



  reset-names:

    items:

      - const: vic



  power-domains:

    maxItems: 1



  iommus:

    maxItems: 1



  interconnects:

    description: Description of the interconnect paths for the VIC;

      see ../interconnect/interconnect.txt for details.

    items:

      - description: memory read client for VIC

      - description: memory write client for VIC



  interconnect-names:

    items:

      - const: dma-mem # read

      - const: write



  dma-coherent: true



additionalProperties: false