Commit 8da0af5d authored Feb 13, 2019 by Fabio Estevam Committed by Shawn Guo Mar 19, 2019

ARM: dts: vf610-zii: Disable SNVS RTC



None of these vf610-zii boards have a battery or super-capacitor
holding up power to the SNVS RTC embedded in the Vybrid SoC,
so it is preferable to disable the snvsrtc node.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

parent 99f698e2

arch/arm/boot/dts/vf610-zii-cfu1.dts

+4 −0

Original line number	Diff line number	Diff line
		@@ -236,6 +236,10 @@
		};
		};

		&snvsrtc {
		status = "disabled";
		};

		&uart0 {
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_uart0>;

arch/arm/boot/dts/vf610-zii-scu4-aib.dts

+4 −0

Original line number	Diff line number	Diff line
		@@ -671,6 +671,10 @@
		};
		};

		&snvsrtc {
		status = "disabled";
		};

		&uart0 {
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_uart0>;

arch/arm/boot/dts/vf610-zii-ssmb-dtu.dts

+4 −0

Original line number	Diff line number	Diff line
		@@ -211,6 +211,10 @@
		};
		};

		&snvsrtc {
		status = "disabled";
		};

		&uart0 {
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_uart0>;

arch/arm/boot/dts/vf610-zii-ssmb-spu3.dts

+4 −0

Original line number	Diff line number	Diff line
		@@ -219,6 +219,10 @@
		};
		};

		&snvsrtc {
		status = "disabled";
		};

		&uart0 {
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_uart0>;