Commit 8d99f03c authored by Anson Huang's avatar Anson Huang Committed by Rob Herring
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dt-bindings: watchdog: Convert i.MX7ULP to json-schema 



Convert the i.MX7ULP watchdog binding to DT schema format using json-schema.

Signed-off-by: default avatarAnson Huang <Anson.Huang@nxp.com>
Signed-off-by: default avatarRob Herring <robh@kernel.org>
parent 81e41fec

Documentation/devicetree/bindings/watchdog/fsl-imx7ulp-wdt.txt

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* Freescale i.MX7ULP Watchdog Timer (WDT) Controller



Required properties:

- compatible : Should be "fsl,imx7ulp-wdt"

- reg : Should contain WDT registers location and length

- interrupts : Should contain WDT interrupt

- clocks: Should contain a phandle pointing to the gated peripheral clock.



Optional properties:

- timeout-sec : Contains the watchdog timeout in seconds



Examples:



wdog1: watchdog@403d0000 {

	compatible = "fsl,imx7ulp-wdt";

	reg = <0x403d0000 0x10000>;

	interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>;

	clocks = <&pcc2 IMX7ULP_CLK_WDG1>;

	assigned-clocks = <&pcc2 IMX7ULP_CLK_WDG1>;

	assigned-clocks-parents = <&scg1 IMX7ULP_CLK_FIRC_BUS_CLK>;

	timeout-sec = <40>;

};

Documentation/devicetree/bindings/watchdog/fsl-imx7ulp-wdt.yaml

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# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)

%YAML 1.2

---

$id: http://devicetree.org/schemas/watchdog/fsl-imx7ulp-wdt.yaml#

$schema: http://devicetree.org/meta-schemas/core.yaml#



title: Freescale i.MX7ULP Watchdog Timer (WDT) Controller



maintainers:

  - Anson Huang <Anson.Huang@nxp.com>



allOf:

  - $ref: "watchdog.yaml#"



properties:

  compatible:

    enum:

      - fsl,imx7ulp-wdt



  reg:

    maxItems: 1



  interrupts:

    maxItems: 1



  clocks:

    maxItems: 1



  assigned-clocks:

    maxItems: 1



  assigned-clocks-parents:

    maxItems: 1



  timeout-sec: true



required:

  - compatible

  - interrupts

  - reg

  - clocks



additionalProperties: false



examples:

  - |

    #include <dt-bindings/interrupt-controller/arm-gic.h>

    #include <dt-bindings/clock/imx7ulp-clock.h>



    watchdog@403d0000 {

        compatible = "fsl,imx7ulp-wdt";

        reg = <0x403d0000 0x10000>;

        interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>;

        clocks = <&pcc2 IMX7ULP_CLK_WDG1>;

        assigned-clocks = <&pcc2 IMX7ULP_CLK_WDG1>;

        assigned-clocks-parents = <&scg1 IMX7ULP_CLK_FIRC_BUS_CLK>;

        timeout-sec = <40>;

    };



...