Commit 8d964307 authored by Oded Gabbay's avatar Oded Gabbay
Browse files

habanalabs: remove hwmgr.c 



The two remaining functions in this file belong to firmware_if.c,
as they communicate with the firmware.

Signed-off-by: default avatarOded Gabbay <ogabbay@kernel.org>
parent 9e2884ce

drivers/misc/habanalabs/common/Makefile

+1 −1
Original line number Diff line number Diff line
@@ -11,4 +11,4 @@ HL_COMMON_FILES := common/habanalabs_drv.o common/device.o common/context.o \ 
		common/command_buffer.o common/hw_queue.o common/irq.o \

		common/sysfs.o common/hwmon.o common/memory.o \

		common/command_submission.o common/firmware_if.o \

		common/state_dump.o common/hwmgr.o
 
		common/state_dump.o

drivers/misc/habanalabs/common/firmware_if.c

+41 −1
Original line number Diff line number Diff line 
// SPDX-License-Identifier: GPL-2.0



/*

 * Copyright 2016-2021 HabanaLabs, Ltd.

 * Copyright 2016-2022 HabanaLabs, Ltd.

 * All Rights Reserved.

 */
@@ -2682,3 +2682,43 @@ int hl_fw_init_cpu(struct hl_device *hdev) 
			hl_fw_dynamic_init_cpu(hdev, fw_loader) :

			hl_fw_static_init_cpu(hdev, fw_loader);

}



void hl_fw_set_pll_profile(struct hl_device *hdev, enum hl_pll_frequency freq)

{

	hl_set_frequency(hdev, hdev->asic_prop.clk_pll_index,

				hdev->asic_prop.max_freq_value);

}



int hl_fw_get_clk_rate(struct hl_device *hdev, u32 *cur_clk, u32 *max_clk)

{

	long value;



	if (!hl_device_operational(hdev, NULL))

		return -ENODEV;



	if (!hdev->pdev) {

		*cur_clk = 0;

		*max_clk = 0;

		return 0;

	}



	value = hl_get_frequency(hdev, hdev->asic_prop.clk_pll_index, false);



	if (value < 0) {

		dev_err(hdev->dev, "Failed to retrieve device max clock %ld\n", value);

		return value;

	}



	*max_clk = (value / 1000 / 1000);



	value = hl_get_frequency(hdev, hdev->asic_prop.clk_pll_index, true);



	if (value < 0) {

		dev_err(hdev->dev, "Failed to retrieve device current clock %ld\n", value);

		return value;

	}



	*cur_clk = (value / 1000 / 1000);



	return 0;

}

drivers/misc/habanalabs/common/habanalabs.h

+2 −2
Original line number Diff line number Diff line
@@ -3120,8 +3120,8 @@ int hl_set_power(struct hl_device *hdev, 
			int sensor_index, u32 attr, long value);

int hl_get_power(struct hl_device *hdev,

			int sensor_index, u32 attr, long *value);

int hl_get_clk_rate(struct hl_device *hdev, u32 *cur_clk, u32 *max_clk);

void hl_set_pll_profile(struct hl_device *hdev, enum hl_pll_frequency freq);

int hl_fw_get_clk_rate(struct hl_device *hdev, u32 *cur_clk, u32 *max_clk);

void hl_fw_set_pll_profile(struct hl_device *hdev, enum hl_pll_frequency freq);

void hl_sysfs_add_dev_clk_attr(struct hl_device *hdev, struct attribute_group *dev_attr_grp);

void hw_sob_get(struct hl_hw_sob *hw_sob);

void hw_sob_put(struct hl_hw_sob *hw_sob);

drivers/misc/habanalabs/common/habanalabs_ioctl.c

+1 −1
Original line number Diff line number Diff line
@@ -251,7 +251,7 @@ static int get_clk_rate(struct hl_device *hdev, struct hl_info_args *args) 
	if ((!max_size) || (!out))

		return -EINVAL;



	rc = hl_get_clk_rate(hdev, &clk_rate.cur_clk_rate_mhz, &clk_rate.max_clk_rate_mhz);

	rc = hl_fw_get_clk_rate(hdev, &clk_rate.cur_clk_rate_mhz, &clk_rate.max_clk_rate_mhz);

	if (rc)

		return rc;

drivers/misc/habanalabs/common/hwmgr.c

deleted100644 → 0
+0 −48
Original line number Diff line number Diff line 
// SPDX-License-Identifier: GPL-2.0



/*

 * Copyright 2019-2021 HabanaLabs, Ltd.

 * All Rights Reserved.

 */



#include "habanalabs.h"



void hl_set_pll_profile(struct hl_device *hdev, enum hl_pll_frequency freq)

{

	hl_set_frequency(hdev, hdev->asic_prop.clk_pll_index,

			hdev->asic_prop.max_freq_value);

}



int hl_get_clk_rate(struct hl_device *hdev, u32 *cur_clk, u32 *max_clk)

{

	long value;



	if (!hl_device_operational(hdev, NULL))

		return -ENODEV;



	if (!hdev->pdev) {

		*cur_clk = 0;

		*max_clk = 0;

		return 0;

	}



	value = hl_get_frequency(hdev, hdev->asic_prop.clk_pll_index, false);



	if (value < 0) {

		dev_err(hdev->dev, "Failed to retrieve device max clock %ld\n", value);

		return value;

	}



	*max_clk = (value / 1000 / 1000);



	value = hl_get_frequency(hdev, hdev->asic_prop.clk_pll_index, true);



	if (value < 0) {

		dev_err(hdev->dev, "Failed to retrieve device current clock %ld\n", value);

		return value;

	}



	*cur_clk = (value / 1000 / 1000);



	return 0;

}