Loading drivers/net/bnx2x/bnx2x.h +0 −5 Original line number Diff line number Diff line Loading @@ -1288,15 +1288,11 @@ struct bnx2x_func_init_params { #define WAIT_RAMROD_POLL 0x01 #define WAIT_RAMROD_COMMON 0x02 int bnx2x_wait_ramrod(struct bnx2x *bp, int state, int idx, int *state_p, int flags); /* dmae */ void bnx2x_read_dmae(struct bnx2x *bp, u32 src_addr, u32 len32); void bnx2x_write_dmae(struct bnx2x *bp, dma_addr_t dma_addr, u32 dst_addr, u32 len32); void bnx2x_write_dmae_phys_len(struct bnx2x *bp, dma_addr_t phys_addr, u32 addr, u32 len); void bnx2x_post_dmae(struct bnx2x *bp, struct dmae_command *dmae, int idx); u32 bnx2x_dmae_opcode_add_comp(u32 opcode, u8 comp_type); u32 bnx2x_dmae_opcode_clr_src_reset(u32 opcode); Loading @@ -1307,7 +1303,6 @@ int bnx2x_get_gpio(struct bnx2x *bp, int gpio_num, u8 port); int bnx2x_set_gpio(struct bnx2x *bp, int gpio_num, u32 mode, u8 port); int bnx2x_set_gpio_int(struct bnx2x *bp, int gpio_num, u32 mode, u8 port); u32 bnx2x_fw_command(struct bnx2x *bp, u32 command, u32 param); void bnx2x_reg_wr_ind(struct bnx2x *bp, u32 addr, u32 val); void bnx2x_calc_fc_adv(struct bnx2x *bp); int bnx2x_sp_post(struct bnx2x *bp, int command, int cid, Loading drivers/net/bnx2x/bnx2x_cmn.c +2 −1 Original line number Diff line number Diff line Loading @@ -25,6 +25,7 @@ #include "bnx2x_init.h" static int bnx2x_setup_irqs(struct bnx2x *bp); /* free skb in the packet ring at pos idx * return idx of last bd freed Loading Loading @@ -2187,7 +2188,7 @@ int bnx2x_change_mac_addr(struct net_device *dev, void *p) } int bnx2x_setup_irqs(struct bnx2x *bp) static int bnx2x_setup_irqs(struct bnx2x *bp) { int rc = 0; if (bp->flags & USING_MSIX_FLAG) { Loading drivers/net/bnx2x/bnx2x_cmn.h +0 −55 Original line number Diff line number Diff line Loading @@ -116,13 +116,6 @@ void bnx2x_setup_cnic_irq_info(struct bnx2x *bp); */ void bnx2x_int_enable(struct bnx2x *bp); /** * Disable HW interrupts. * * @param bp */ void bnx2x_int_disable(struct bnx2x *bp); /** * Disable interrupts. This function ensures that there are no * ISRs or SP DPCs (sp_task) are running after it returns. Loading Loading @@ -191,17 +184,6 @@ void bnx2x_free_mem(struct bnx2x *bp); int bnx2x_setup_client(struct bnx2x *bp, struct bnx2x_fastpath *fp, int is_leading); /** * Bring down an eth client. * * @param bp * @param p * * @return int */ int bnx2x_stop_fw_client(struct bnx2x *bp, struct bnx2x_client_ramrod_params *p); /** * Set number of queues according to mode * Loading Loading @@ -250,34 +232,6 @@ int bnx2x_release_hw_lock(struct bnx2x *bp, u32 resource); */ void bnx2x_set_eth_mac(struct bnx2x *bp, int set); #ifdef BCM_CNIC /** * Set iSCSI MAC(s) at the next enties in the CAM after the ETH * MAC(s). The function will wait until the ramrod completion * returns. * * @param bp driver handle * @param set set or clear the CAM entry * * @return 0 if cussess, -ENODEV if ramrod doesn't return. */ int bnx2x_set_iscsi_eth_mac_addr(struct bnx2x *bp, int set); #endif /** * Initialize status block in FW and HW * * @param bp driver handle * @param dma_addr_t mapping * @param int sb_id * @param int vfid * @param u8 vf_valid * @param int fw_sb_id * @param int igu_sb_id */ void bnx2x_init_sb(struct bnx2x *bp, dma_addr_t mapping, int vfid, u8 vf_valid, int fw_sb_id, int igu_sb_id); /** * Set MAC filtering configurations. * Loading Loading @@ -326,7 +280,6 @@ void bnx2x_sp_event(struct bnx2x_fastpath *fp, union eth_rx_cqe *rr_cqe); * @return int */ int bnx2x_func_start(struct bnx2x *bp); int bnx2x_func_stop(struct bnx2x *bp); /** * Prepare ILT configurations according to current driver Loading Loading @@ -395,14 +348,6 @@ int bnx2x_enable_msix(struct bnx2x *bp); */ int bnx2x_enable_msi(struct bnx2x *bp); /** * Request IRQ vectors from OS. * * @param bp * * @return int */ int bnx2x_setup_irqs(struct bnx2x *bp); /** * NAPI callback * Loading drivers/net/bnx2x/bnx2x_init_ops.h +19 −15 Original line number Diff line number Diff line Loading @@ -16,7 +16,9 @@ #define BNX2X_INIT_OPS_H static int bnx2x_gunzip(struct bnx2x *bp, const u8 *zbuf, int len); static void bnx2x_reg_wr_ind(struct bnx2x *bp, u32 addr, u32 val); static void bnx2x_write_dmae_phys_len(struct bnx2x *bp, dma_addr_t phys_addr, u32 addr, u32 len); static void bnx2x_init_str_wr(struct bnx2x *bp, u32 addr, const u32 *data, u32 len) Loading Loading @@ -589,7 +591,7 @@ static int bnx2x_ilt_client_mem_op(struct bnx2x *bp, int cli_num, u8 memop) return rc; } int bnx2x_ilt_mem_op(struct bnx2x *bp, u8 memop) static int bnx2x_ilt_mem_op(struct bnx2x *bp, u8 memop) { int rc = bnx2x_ilt_client_mem_op(bp, ILT_CLIENT_CDU, memop); if (!rc) Loading Loading @@ -635,7 +637,7 @@ static void bnx2x_ilt_line_init_op(struct bnx2x *bp, struct bnx2x_ilt *ilt, } } void bnx2x_ilt_boundry_init_op(struct bnx2x *bp, static void bnx2x_ilt_boundry_init_op(struct bnx2x *bp, struct ilt_client_info *ilt_cli, u32 ilt_start, u8 initop) { Loading Loading @@ -688,8 +690,10 @@ void bnx2x_ilt_boundry_init_op(struct bnx2x *bp, } } void bnx2x_ilt_client_init_op_ilt(struct bnx2x *bp, struct bnx2x_ilt *ilt, struct ilt_client_info *ilt_cli, u8 initop) static void bnx2x_ilt_client_init_op_ilt(struct bnx2x *bp, struct bnx2x_ilt *ilt, struct ilt_client_info *ilt_cli, u8 initop) { int i; Loading @@ -703,7 +707,7 @@ void bnx2x_ilt_client_init_op_ilt(struct bnx2x *bp, struct bnx2x_ilt *ilt, bnx2x_ilt_boundry_init_op(bp, ilt_cli, ilt->start_line, initop); } void bnx2x_ilt_client_init_op(struct bnx2x *bp, static void bnx2x_ilt_client_init_op(struct bnx2x *bp, struct ilt_client_info *ilt_cli, u8 initop) { struct bnx2x_ilt *ilt = BP_ILT(bp); Loading @@ -720,7 +724,7 @@ static void bnx2x_ilt_client_id_init_op(struct bnx2x *bp, bnx2x_ilt_client_init_op(bp, ilt_cli, initop); } void bnx2x_ilt_init_op(struct bnx2x *bp, u8 initop) static void bnx2x_ilt_init_op(struct bnx2x *bp, u8 initop) { bnx2x_ilt_client_id_init_op(bp, ILT_CLIENT_CDU, initop); bnx2x_ilt_client_id_init_op(bp, ILT_CLIENT_QM, initop); Loading Loading @@ -752,7 +756,7 @@ static void bnx2x_ilt_init_client_psz(struct bnx2x *bp, int cli_num, * called during init common stage, ilt clients should be initialized * prioir to calling this function */ void bnx2x_ilt_init_page_size(struct bnx2x *bp, u8 initop) static void bnx2x_ilt_init_page_size(struct bnx2x *bp, u8 initop) { bnx2x_ilt_init_client_psz(bp, ILT_CLIENT_CDU, PXP2_REG_RQ_CDU_P_SIZE, initop); Loading @@ -772,7 +776,7 @@ void bnx2x_ilt_init_page_size(struct bnx2x *bp, u8 initop) #define QM_INIT(cid_cnt) (cid_cnt > QM_INIT_MIN_CID_COUNT) /* called during init port stage */ void bnx2x_qm_init_cid_count(struct bnx2x *bp, int qm_cid_count, static void bnx2x_qm_init_cid_count(struct bnx2x *bp, int qm_cid_count, u8 initop) { int port = BP_PORT(bp); Loading Loading @@ -814,7 +818,7 @@ static void bnx2x_qm_set_ptr_table(struct bnx2x *bp, int qm_cid_count) } /* called during init common stage */ void bnx2x_qm_init_ptr_table(struct bnx2x *bp, int qm_cid_count, static void bnx2x_qm_init_ptr_table(struct bnx2x *bp, int qm_cid_count, u8 initop) { if (!QM_INIT(qm_cid_count)) Loading @@ -836,7 +840,7 @@ void bnx2x_qm_init_ptr_table(struct bnx2x *bp, int qm_cid_count, ****************************************************************************/ /* called during init func stage */ void bnx2x_src_init_t2(struct bnx2x *bp, struct src_ent *t2, static void bnx2x_src_init_t2(struct bnx2x *bp, struct src_ent *t2, dma_addr_t t2_mapping, int src_cid_count) { int i; Loading drivers/net/bnx2x/bnx2x_link.c +10 −127 Original line number Diff line number Diff line Loading @@ -181,6 +181,12 @@ (_bank + (_addr & 0xf)), \ _val) static u8 bnx2x_cl45_read(struct bnx2x *bp, struct bnx2x_phy *phy, u8 devad, u16 reg, u16 *ret_val); static u8 bnx2x_cl45_write(struct bnx2x *bp, struct bnx2x_phy *phy, u8 devad, u16 reg, u16 val); static u32 bnx2x_bits_en(struct bnx2x *bp, u32 reg, u32 bits) { u32 val = REG_RD(bp, reg); Loading Loading @@ -594,7 +600,7 @@ static u8 bnx2x_bmac2_enable(struct link_params *params, return 0; } u8 bnx2x_bmac_enable(struct link_params *params, static u8 bnx2x_bmac_enable(struct link_params *params, struct link_vars *vars, u8 is_lb) { Loading Loading @@ -2537,122 +2543,6 @@ static void bnx2x_set_xgxs_loopback(struct bnx2x_phy *phy, } } /* *------------------------------------------------------------------------ * bnx2x_override_led_value - * * Override the led value of the requested led * *------------------------------------------------------------------------ */ u8 bnx2x_override_led_value(struct bnx2x *bp, u8 port, u32 led_idx, u32 value) { u32 reg_val; /* If port 0 then use EMAC0, else use EMAC1*/ u32 emac_base = (port) ? GRCBASE_EMAC1 : GRCBASE_EMAC0; DP(NETIF_MSG_LINK, "bnx2x_override_led_value() port %x led_idx %d value %d\n", port, led_idx, value); switch (led_idx) { case 0: /* 10MB led */ /* Read the current value of the LED register in the EMAC block */ reg_val = REG_RD(bp, emac_base + EMAC_REG_EMAC_LED); /* Set the OVERRIDE bit to 1 */ reg_val |= EMAC_LED_OVERRIDE; /* If value is 1, set the 10M_OVERRIDE bit, otherwise reset it.*/ reg_val = (value == 1) ? (reg_val | EMAC_LED_10MB_OVERRIDE) : (reg_val & ~EMAC_LED_10MB_OVERRIDE); REG_WR(bp, emac_base + EMAC_REG_EMAC_LED, reg_val); break; case 1: /*100MB led */ /*Read the current value of the LED register in the EMAC block */ reg_val = REG_RD(bp, emac_base + EMAC_REG_EMAC_LED); /* Set the OVERRIDE bit to 1 */ reg_val |= EMAC_LED_OVERRIDE; /* If value is 1, set the 100M_OVERRIDE bit, otherwise reset it.*/ reg_val = (value == 1) ? (reg_val | EMAC_LED_100MB_OVERRIDE) : (reg_val & ~EMAC_LED_100MB_OVERRIDE); REG_WR(bp, emac_base + EMAC_REG_EMAC_LED, reg_val); break; case 2: /* 1000MB led */ /* Read the current value of the LED register in the EMAC block */ reg_val = REG_RD(bp, emac_base + EMAC_REG_EMAC_LED); /* Set the OVERRIDE bit to 1 */ reg_val |= EMAC_LED_OVERRIDE; /* If value is 1, set the 1000M_OVERRIDE bit, otherwise reset it. */ reg_val = (value == 1) ? (reg_val | EMAC_LED_1000MB_OVERRIDE) : (reg_val & ~EMAC_LED_1000MB_OVERRIDE); REG_WR(bp, emac_base + EMAC_REG_EMAC_LED, reg_val); break; case 3: /* 2500MB led */ /* Read the current value of the LED register in the EMAC block*/ reg_val = REG_RD(bp, emac_base + EMAC_REG_EMAC_LED); /* Set the OVERRIDE bit to 1 */ reg_val |= EMAC_LED_OVERRIDE; /* If value is 1, set the 2500M_OVERRIDE bit, otherwise reset it.*/ reg_val = (value == 1) ? (reg_val | EMAC_LED_2500MB_OVERRIDE) : (reg_val & ~EMAC_LED_2500MB_OVERRIDE); REG_WR(bp, emac_base + EMAC_REG_EMAC_LED, reg_val); break; case 4: /*10G led */ if (port == 0) { REG_WR(bp, NIG_REG_LED_10G_P0, value); } else { REG_WR(bp, NIG_REG_LED_10G_P1, value); } break; case 5: /* TRAFFIC led */ /* Find if the traffic control is via BMAC or EMAC */ if (port == 0) reg_val = REG_RD(bp, NIG_REG_NIG_EMAC0_EN); else reg_val = REG_RD(bp, NIG_REG_NIG_EMAC1_EN); /* Override the traffic led in the EMAC:*/ if (reg_val == 1) { /* Read the current value of the LED register in the EMAC block */ reg_val = REG_RD(bp, emac_base + EMAC_REG_EMAC_LED); /* Set the TRAFFIC_OVERRIDE bit to 1 */ reg_val |= EMAC_LED_OVERRIDE; /* If value is 1, set the TRAFFIC bit, otherwise reset it.*/ reg_val = (value == 1) ? (reg_val | EMAC_LED_TRAFFIC) : (reg_val & ~EMAC_LED_TRAFFIC); REG_WR(bp, emac_base + EMAC_REG_EMAC_LED, reg_val); } else { /* Override the traffic led in the BMAC: */ REG_WR(bp, NIG_REG_LED_CONTROL_OVERRIDE_TRAFFIC_P0 + port*4, 1); REG_WR(bp, NIG_REG_LED_CONTROL_TRAFFIC_P0 + port*4, value); } break; default: DP(NETIF_MSG_LINK, "bnx2x_override_led_value() unknown led index %d " "(should be 0-5)\n", led_idx); return -EINVAL; } return 0; } u8 bnx2x_set_led(struct link_params *params, struct link_vars *vars, u8 mode, u32 speed) { Loading Loading @@ -4099,7 +3989,7 @@ static u8 bnx2x_8727_read_sfp_module_eeprom(struct bnx2x_phy *phy, return -EINVAL; } u8 bnx2x_read_sfp_module_eeprom(struct bnx2x_phy *phy, static u8 bnx2x_read_sfp_module_eeprom(struct bnx2x_phy *phy, struct link_params *params, u16 addr, u8 byte_cnt, u8 *o_buf) { Loading Loading @@ -6819,13 +6709,6 @@ u8 bnx2x_phy_probe(struct link_params *params) return 0; } u32 bnx2x_supported_attr(struct link_params *params, u8 phy_idx) { if (phy_idx < params->num_phys) return params->phy[phy_idx].supported; return 0; } static void set_phy_vars(struct link_params *params) { struct bnx2x *bp = params->bp; Loading Loading
drivers/net/bnx2x/bnx2x.h +0 −5 Original line number Diff line number Diff line Loading @@ -1288,15 +1288,11 @@ struct bnx2x_func_init_params { #define WAIT_RAMROD_POLL 0x01 #define WAIT_RAMROD_COMMON 0x02 int bnx2x_wait_ramrod(struct bnx2x *bp, int state, int idx, int *state_p, int flags); /* dmae */ void bnx2x_read_dmae(struct bnx2x *bp, u32 src_addr, u32 len32); void bnx2x_write_dmae(struct bnx2x *bp, dma_addr_t dma_addr, u32 dst_addr, u32 len32); void bnx2x_write_dmae_phys_len(struct bnx2x *bp, dma_addr_t phys_addr, u32 addr, u32 len); void bnx2x_post_dmae(struct bnx2x *bp, struct dmae_command *dmae, int idx); u32 bnx2x_dmae_opcode_add_comp(u32 opcode, u8 comp_type); u32 bnx2x_dmae_opcode_clr_src_reset(u32 opcode); Loading @@ -1307,7 +1303,6 @@ int bnx2x_get_gpio(struct bnx2x *bp, int gpio_num, u8 port); int bnx2x_set_gpio(struct bnx2x *bp, int gpio_num, u32 mode, u8 port); int bnx2x_set_gpio_int(struct bnx2x *bp, int gpio_num, u32 mode, u8 port); u32 bnx2x_fw_command(struct bnx2x *bp, u32 command, u32 param); void bnx2x_reg_wr_ind(struct bnx2x *bp, u32 addr, u32 val); void bnx2x_calc_fc_adv(struct bnx2x *bp); int bnx2x_sp_post(struct bnx2x *bp, int command, int cid, Loading
drivers/net/bnx2x/bnx2x_cmn.c +2 −1 Original line number Diff line number Diff line Loading @@ -25,6 +25,7 @@ #include "bnx2x_init.h" static int bnx2x_setup_irqs(struct bnx2x *bp); /* free skb in the packet ring at pos idx * return idx of last bd freed Loading Loading @@ -2187,7 +2188,7 @@ int bnx2x_change_mac_addr(struct net_device *dev, void *p) } int bnx2x_setup_irqs(struct bnx2x *bp) static int bnx2x_setup_irqs(struct bnx2x *bp) { int rc = 0; if (bp->flags & USING_MSIX_FLAG) { Loading
drivers/net/bnx2x/bnx2x_cmn.h +0 −55 Original line number Diff line number Diff line Loading @@ -116,13 +116,6 @@ void bnx2x_setup_cnic_irq_info(struct bnx2x *bp); */ void bnx2x_int_enable(struct bnx2x *bp); /** * Disable HW interrupts. * * @param bp */ void bnx2x_int_disable(struct bnx2x *bp); /** * Disable interrupts. This function ensures that there are no * ISRs or SP DPCs (sp_task) are running after it returns. Loading Loading @@ -191,17 +184,6 @@ void bnx2x_free_mem(struct bnx2x *bp); int bnx2x_setup_client(struct bnx2x *bp, struct bnx2x_fastpath *fp, int is_leading); /** * Bring down an eth client. * * @param bp * @param p * * @return int */ int bnx2x_stop_fw_client(struct bnx2x *bp, struct bnx2x_client_ramrod_params *p); /** * Set number of queues according to mode * Loading Loading @@ -250,34 +232,6 @@ int bnx2x_release_hw_lock(struct bnx2x *bp, u32 resource); */ void bnx2x_set_eth_mac(struct bnx2x *bp, int set); #ifdef BCM_CNIC /** * Set iSCSI MAC(s) at the next enties in the CAM after the ETH * MAC(s). The function will wait until the ramrod completion * returns. * * @param bp driver handle * @param set set or clear the CAM entry * * @return 0 if cussess, -ENODEV if ramrod doesn't return. */ int bnx2x_set_iscsi_eth_mac_addr(struct bnx2x *bp, int set); #endif /** * Initialize status block in FW and HW * * @param bp driver handle * @param dma_addr_t mapping * @param int sb_id * @param int vfid * @param u8 vf_valid * @param int fw_sb_id * @param int igu_sb_id */ void bnx2x_init_sb(struct bnx2x *bp, dma_addr_t mapping, int vfid, u8 vf_valid, int fw_sb_id, int igu_sb_id); /** * Set MAC filtering configurations. * Loading Loading @@ -326,7 +280,6 @@ void bnx2x_sp_event(struct bnx2x_fastpath *fp, union eth_rx_cqe *rr_cqe); * @return int */ int bnx2x_func_start(struct bnx2x *bp); int bnx2x_func_stop(struct bnx2x *bp); /** * Prepare ILT configurations according to current driver Loading Loading @@ -395,14 +348,6 @@ int bnx2x_enable_msix(struct bnx2x *bp); */ int bnx2x_enable_msi(struct bnx2x *bp); /** * Request IRQ vectors from OS. * * @param bp * * @return int */ int bnx2x_setup_irqs(struct bnx2x *bp); /** * NAPI callback * Loading
drivers/net/bnx2x/bnx2x_init_ops.h +19 −15 Original line number Diff line number Diff line Loading @@ -16,7 +16,9 @@ #define BNX2X_INIT_OPS_H static int bnx2x_gunzip(struct bnx2x *bp, const u8 *zbuf, int len); static void bnx2x_reg_wr_ind(struct bnx2x *bp, u32 addr, u32 val); static void bnx2x_write_dmae_phys_len(struct bnx2x *bp, dma_addr_t phys_addr, u32 addr, u32 len); static void bnx2x_init_str_wr(struct bnx2x *bp, u32 addr, const u32 *data, u32 len) Loading Loading @@ -589,7 +591,7 @@ static int bnx2x_ilt_client_mem_op(struct bnx2x *bp, int cli_num, u8 memop) return rc; } int bnx2x_ilt_mem_op(struct bnx2x *bp, u8 memop) static int bnx2x_ilt_mem_op(struct bnx2x *bp, u8 memop) { int rc = bnx2x_ilt_client_mem_op(bp, ILT_CLIENT_CDU, memop); if (!rc) Loading Loading @@ -635,7 +637,7 @@ static void bnx2x_ilt_line_init_op(struct bnx2x *bp, struct bnx2x_ilt *ilt, } } void bnx2x_ilt_boundry_init_op(struct bnx2x *bp, static void bnx2x_ilt_boundry_init_op(struct bnx2x *bp, struct ilt_client_info *ilt_cli, u32 ilt_start, u8 initop) { Loading Loading @@ -688,8 +690,10 @@ void bnx2x_ilt_boundry_init_op(struct bnx2x *bp, } } void bnx2x_ilt_client_init_op_ilt(struct bnx2x *bp, struct bnx2x_ilt *ilt, struct ilt_client_info *ilt_cli, u8 initop) static void bnx2x_ilt_client_init_op_ilt(struct bnx2x *bp, struct bnx2x_ilt *ilt, struct ilt_client_info *ilt_cli, u8 initop) { int i; Loading @@ -703,7 +707,7 @@ void bnx2x_ilt_client_init_op_ilt(struct bnx2x *bp, struct bnx2x_ilt *ilt, bnx2x_ilt_boundry_init_op(bp, ilt_cli, ilt->start_line, initop); } void bnx2x_ilt_client_init_op(struct bnx2x *bp, static void bnx2x_ilt_client_init_op(struct bnx2x *bp, struct ilt_client_info *ilt_cli, u8 initop) { struct bnx2x_ilt *ilt = BP_ILT(bp); Loading @@ -720,7 +724,7 @@ static void bnx2x_ilt_client_id_init_op(struct bnx2x *bp, bnx2x_ilt_client_init_op(bp, ilt_cli, initop); } void bnx2x_ilt_init_op(struct bnx2x *bp, u8 initop) static void bnx2x_ilt_init_op(struct bnx2x *bp, u8 initop) { bnx2x_ilt_client_id_init_op(bp, ILT_CLIENT_CDU, initop); bnx2x_ilt_client_id_init_op(bp, ILT_CLIENT_QM, initop); Loading Loading @@ -752,7 +756,7 @@ static void bnx2x_ilt_init_client_psz(struct bnx2x *bp, int cli_num, * called during init common stage, ilt clients should be initialized * prioir to calling this function */ void bnx2x_ilt_init_page_size(struct bnx2x *bp, u8 initop) static void bnx2x_ilt_init_page_size(struct bnx2x *bp, u8 initop) { bnx2x_ilt_init_client_psz(bp, ILT_CLIENT_CDU, PXP2_REG_RQ_CDU_P_SIZE, initop); Loading @@ -772,7 +776,7 @@ void bnx2x_ilt_init_page_size(struct bnx2x *bp, u8 initop) #define QM_INIT(cid_cnt) (cid_cnt > QM_INIT_MIN_CID_COUNT) /* called during init port stage */ void bnx2x_qm_init_cid_count(struct bnx2x *bp, int qm_cid_count, static void bnx2x_qm_init_cid_count(struct bnx2x *bp, int qm_cid_count, u8 initop) { int port = BP_PORT(bp); Loading Loading @@ -814,7 +818,7 @@ static void bnx2x_qm_set_ptr_table(struct bnx2x *bp, int qm_cid_count) } /* called during init common stage */ void bnx2x_qm_init_ptr_table(struct bnx2x *bp, int qm_cid_count, static void bnx2x_qm_init_ptr_table(struct bnx2x *bp, int qm_cid_count, u8 initop) { if (!QM_INIT(qm_cid_count)) Loading @@ -836,7 +840,7 @@ void bnx2x_qm_init_ptr_table(struct bnx2x *bp, int qm_cid_count, ****************************************************************************/ /* called during init func stage */ void bnx2x_src_init_t2(struct bnx2x *bp, struct src_ent *t2, static void bnx2x_src_init_t2(struct bnx2x *bp, struct src_ent *t2, dma_addr_t t2_mapping, int src_cid_count) { int i; Loading
drivers/net/bnx2x/bnx2x_link.c +10 −127 Original line number Diff line number Diff line Loading @@ -181,6 +181,12 @@ (_bank + (_addr & 0xf)), \ _val) static u8 bnx2x_cl45_read(struct bnx2x *bp, struct bnx2x_phy *phy, u8 devad, u16 reg, u16 *ret_val); static u8 bnx2x_cl45_write(struct bnx2x *bp, struct bnx2x_phy *phy, u8 devad, u16 reg, u16 val); static u32 bnx2x_bits_en(struct bnx2x *bp, u32 reg, u32 bits) { u32 val = REG_RD(bp, reg); Loading Loading @@ -594,7 +600,7 @@ static u8 bnx2x_bmac2_enable(struct link_params *params, return 0; } u8 bnx2x_bmac_enable(struct link_params *params, static u8 bnx2x_bmac_enable(struct link_params *params, struct link_vars *vars, u8 is_lb) { Loading Loading @@ -2537,122 +2543,6 @@ static void bnx2x_set_xgxs_loopback(struct bnx2x_phy *phy, } } /* *------------------------------------------------------------------------ * bnx2x_override_led_value - * * Override the led value of the requested led * *------------------------------------------------------------------------ */ u8 bnx2x_override_led_value(struct bnx2x *bp, u8 port, u32 led_idx, u32 value) { u32 reg_val; /* If port 0 then use EMAC0, else use EMAC1*/ u32 emac_base = (port) ? GRCBASE_EMAC1 : GRCBASE_EMAC0; DP(NETIF_MSG_LINK, "bnx2x_override_led_value() port %x led_idx %d value %d\n", port, led_idx, value); switch (led_idx) { case 0: /* 10MB led */ /* Read the current value of the LED register in the EMAC block */ reg_val = REG_RD(bp, emac_base + EMAC_REG_EMAC_LED); /* Set the OVERRIDE bit to 1 */ reg_val |= EMAC_LED_OVERRIDE; /* If value is 1, set the 10M_OVERRIDE bit, otherwise reset it.*/ reg_val = (value == 1) ? (reg_val | EMAC_LED_10MB_OVERRIDE) : (reg_val & ~EMAC_LED_10MB_OVERRIDE); REG_WR(bp, emac_base + EMAC_REG_EMAC_LED, reg_val); break; case 1: /*100MB led */ /*Read the current value of the LED register in the EMAC block */ reg_val = REG_RD(bp, emac_base + EMAC_REG_EMAC_LED); /* Set the OVERRIDE bit to 1 */ reg_val |= EMAC_LED_OVERRIDE; /* If value is 1, set the 100M_OVERRIDE bit, otherwise reset it.*/ reg_val = (value == 1) ? (reg_val | EMAC_LED_100MB_OVERRIDE) : (reg_val & ~EMAC_LED_100MB_OVERRIDE); REG_WR(bp, emac_base + EMAC_REG_EMAC_LED, reg_val); break; case 2: /* 1000MB led */ /* Read the current value of the LED register in the EMAC block */ reg_val = REG_RD(bp, emac_base + EMAC_REG_EMAC_LED); /* Set the OVERRIDE bit to 1 */ reg_val |= EMAC_LED_OVERRIDE; /* If value is 1, set the 1000M_OVERRIDE bit, otherwise reset it. */ reg_val = (value == 1) ? (reg_val | EMAC_LED_1000MB_OVERRIDE) : (reg_val & ~EMAC_LED_1000MB_OVERRIDE); REG_WR(bp, emac_base + EMAC_REG_EMAC_LED, reg_val); break; case 3: /* 2500MB led */ /* Read the current value of the LED register in the EMAC block*/ reg_val = REG_RD(bp, emac_base + EMAC_REG_EMAC_LED); /* Set the OVERRIDE bit to 1 */ reg_val |= EMAC_LED_OVERRIDE; /* If value is 1, set the 2500M_OVERRIDE bit, otherwise reset it.*/ reg_val = (value == 1) ? (reg_val | EMAC_LED_2500MB_OVERRIDE) : (reg_val & ~EMAC_LED_2500MB_OVERRIDE); REG_WR(bp, emac_base + EMAC_REG_EMAC_LED, reg_val); break; case 4: /*10G led */ if (port == 0) { REG_WR(bp, NIG_REG_LED_10G_P0, value); } else { REG_WR(bp, NIG_REG_LED_10G_P1, value); } break; case 5: /* TRAFFIC led */ /* Find if the traffic control is via BMAC or EMAC */ if (port == 0) reg_val = REG_RD(bp, NIG_REG_NIG_EMAC0_EN); else reg_val = REG_RD(bp, NIG_REG_NIG_EMAC1_EN); /* Override the traffic led in the EMAC:*/ if (reg_val == 1) { /* Read the current value of the LED register in the EMAC block */ reg_val = REG_RD(bp, emac_base + EMAC_REG_EMAC_LED); /* Set the TRAFFIC_OVERRIDE bit to 1 */ reg_val |= EMAC_LED_OVERRIDE; /* If value is 1, set the TRAFFIC bit, otherwise reset it.*/ reg_val = (value == 1) ? (reg_val | EMAC_LED_TRAFFIC) : (reg_val & ~EMAC_LED_TRAFFIC); REG_WR(bp, emac_base + EMAC_REG_EMAC_LED, reg_val); } else { /* Override the traffic led in the BMAC: */ REG_WR(bp, NIG_REG_LED_CONTROL_OVERRIDE_TRAFFIC_P0 + port*4, 1); REG_WR(bp, NIG_REG_LED_CONTROL_TRAFFIC_P0 + port*4, value); } break; default: DP(NETIF_MSG_LINK, "bnx2x_override_led_value() unknown led index %d " "(should be 0-5)\n", led_idx); return -EINVAL; } return 0; } u8 bnx2x_set_led(struct link_params *params, struct link_vars *vars, u8 mode, u32 speed) { Loading Loading @@ -4099,7 +3989,7 @@ static u8 bnx2x_8727_read_sfp_module_eeprom(struct bnx2x_phy *phy, return -EINVAL; } u8 bnx2x_read_sfp_module_eeprom(struct bnx2x_phy *phy, static u8 bnx2x_read_sfp_module_eeprom(struct bnx2x_phy *phy, struct link_params *params, u16 addr, u8 byte_cnt, u8 *o_buf) { Loading Loading @@ -6819,13 +6709,6 @@ u8 bnx2x_phy_probe(struct link_params *params) return 0; } u32 bnx2x_supported_attr(struct link_params *params, u8 phy_idx) { if (phy_idx < params->num_phys) return params->phy[phy_idx].supported; return 0; } static void set_phy_vars(struct link_params *params) { struct bnx2x *bp = params->bp; Loading