Unverified Commit 8d60eec4 authored by openeuler-ci-bot's avatar openeuler-ci-bot Committed by Gitee
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!4966 [sync] PR-4934: arm64: head.S: always initialize PSTATE 

Merge Pull Request from: @openeuler-sync-bot 
 

Origin pull request: 
https://gitee.com/openeuler/kernel/pulls/4934 
 
PR sync from: Li Zetao <lizetao1@huawei.com>
https://mailweb.openeuler.org/hyperkitty/list/kernel@openeuler.org/message/A4DTQUI4PJ4VNR5RWZ74L4ENMSL2OSE2/ 
 
https://gitee.com/openeuler/kernel/issues/I95U8R 
 
Link:https://gitee.com/openeuler/kernel/pulls/4966

 

Reviewed-by: default avatarZhang Jianhua <chris.zjh@huawei.com>
Signed-off-by: default avatarJialin Zhang <zhangjialin11@huawei.com>
parents 06d20965 f65fa01c

arch/arm64/include/asm/ptrace.h

+5 −0
Original line number Diff line number Diff line
@@ -16,6 +16,11 @@ 
#define CurrentEL_EL1		(1 << 2)

#define CurrentEL_EL2		(2 << 2)



#define INIT_PSTATE_EL1 \

	(PSR_D_BIT | PSR_A_BIT | PSR_I_BIT | PSR_F_BIT | PSR_MODE_EL1h)

#define INIT_PSTATE_EL2 \

	(PSR_D_BIT | PSR_A_BIT | PSR_I_BIT | PSR_F_BIT | PSR_MODE_EL2h)



/*

 * PMR values used to mask/unmask interrupts.

 *

arch/arm64/kernel/head.S

+21 −11
Original line number Diff line number Diff line
@@ -531,21 +531,29 @@ EXPORT_SYMBOL(kimage_vaddr) 
 * If we're fortunate enough to boot at EL2, ensure that the world is

 * sane before dropping to EL1.

 *

 * Since we cannot always rely on ERET synchronizing writes to sysregs (e.g. if

 * SCTLR_ELx.EOS is clear), we place an ISB prior to ERET.

 *

 * Returns either BOOT_CPU_MODE_EL1 or BOOT_CPU_MODE_EL2 in w0 if

 * booted in EL1 or EL2 respectively.

 */

SYM_FUNC_START(el2_setup)

	msr	SPsel, #1			// We want to use SP_EL{1,2}

	mrs	x0, CurrentEL

	cmp	x0, #CurrentEL_EL2

	b.eq	1f

	b.eq	init_el2



SYM_INNER_LABEL(init_el1, SYM_L_LOCAL)

	mov_q	x0, INIT_SCTLR_EL1_MMU_OFF

	msr	sctlr_el1, x0

	mov	w0, #BOOT_CPU_MODE_EL1		// This cpu booted in EL1

	isb

	ret

	mov_q	x0, INIT_PSTATE_EL1

	msr	spsr_el1, x0

	msr	elr_el1, lr

	mov	w0, #BOOT_CPU_MODE_EL1

	eret



1:	mov_q	x0, INIT_SCTLR_EL2_MMU_OFF

SYM_INNER_LABEL(init_el2, SYM_L_LOCAL)

	mov_q	x0, INIT_SCTLR_EL2_MMU_OFF

	msr	sctlr_el2, x0



#ifdef CONFIG_ARM64_VHE
@@ -657,9 +665,12 @@ set_hcr: 


	cbz	x2, install_el2_stub



	mov	w0, #BOOT_CPU_MODE_EL2		// This CPU booted in EL2

	isb

	ret

	mov_q	x0, INIT_PSTATE_EL2

	msr	spsr_el2, x0

	msr	elr_el2, lr

	mov	w0, #BOOT_CPU_MODE_EL2

	eret



/* Disable any fine grained traps */

.macro __init_el2_fgt
@@ -778,12 +789,11 @@ SYM_INNER_LABEL(install_el2_stub, SYM_L_LOCAL) 
7:	adr_l	x0, __hyp_stub_vectors

	msr	vbar_el2, x0



	/* spsr */

	mov	x0, #(PSR_F_BIT | PSR_I_BIT | PSR_A_BIT | PSR_D_BIT |\

		      PSR_MODE_EL1h)

	isb

	mov	x0, #INIT_PSTATE_EL1

	msr	spsr_el2, x0

	msr	elr_el2, lr

	mov	w0, #BOOT_CPU_MODE_EL2		// This CPU booted in EL2

	mov	w0, #BOOT_CPU_MODE_EL2

	eret

SYM_FUNC_END(el2_setup)