Commit 8d27b147 authored by Stephen Boyd's avatar Stephen Boyd
Browse files

Merge tag 'v5.16-rockchip-clk-1' of... 

Merge tag 'v5.16-rockchip-clk-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into clk-rockchip

Pull Rockchip clk driver updates from Heiko Stuebner:

 - Move to use module_platform_probe
 - Enable usage of Coresight-related clocks on rk3399

* tag 'v5.16-rockchip-clk-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
  clk: rockchip: use module_platform_driver_probe
  clk: rockchip: rk3399: expose PCLK_COREDBG_{B,L}
  clk: rockchip: rk3399: make CPU clocks critical
parents 6880fa6c 1da80da0

drivers/clk/rockchip/clk-rk3399.c

+10 −7
Original line number Diff line number Diff line
@@ -481,7 +481,7 @@ static struct rockchip_clk_branch rk3399_clk_branches[] __initdata = { 
	COMPOSITE_NOMUX(0, "atclk_core_l", "armclkl", CLK_IGNORE_UNUSED,

			RK3399_CLKSEL_CON(1), 0, 5, DFLAGS | CLK_DIVIDER_READ_ONLY,

			RK3399_CLKGATE_CON(0), 5, GFLAGS),

	COMPOSITE_NOMUX(0, "pclk_dbg_core_l", "armclkl", CLK_IGNORE_UNUSED,

	COMPOSITE_NOMUX(PCLK_COREDBG_L, "pclk_dbg_core_l", "armclkl", CLK_IGNORE_UNUSED,

			RK3399_CLKSEL_CON(1), 8, 5, DFLAGS | CLK_DIVIDER_READ_ONLY,

			RK3399_CLKGATE_CON(0), 6, GFLAGS),
@@ -531,7 +531,7 @@ static struct rockchip_clk_branch rk3399_clk_branches[] __initdata = { 
	GATE(ACLK_GIC_ADB400_CORE_B_2_GIC, "aclk_core_adb400_core_b_2_gic", "armclkb", CLK_IGNORE_UNUSED,

			RK3399_CLKGATE_CON(14), 4, GFLAGS),



	DIV(0, "pclken_dbg_core_b", "pclk_dbg_core_b", CLK_IGNORE_UNUSED,

	DIV(PCLK_COREDBG_B, "pclken_dbg_core_b", "pclk_dbg_core_b", CLK_IGNORE_UNUSED,

			RK3399_CLKSEL_CON(3), 13, 2, DFLAGS | CLK_DIVIDER_READ_ONLY),



	GATE(0, "pclk_dbg_cxcs_pd_core_b", "pclk_dbg_core_b", CLK_IGNORE_UNUSED,
@@ -1514,7 +1514,10 @@ static const char *const rk3399_cru_critical_clocks[] __initconst = { 
	"aclk_vio_noc",



	/* ddrc */

	"sclk_ddrc"

	"sclk_ddrc",



	"armclkl",

	"armclkb",

};



static const char *const rk3399_pmucru_critical_clocks[] __initconst = {
@@ -1549,9 +1552,6 @@ static void __init rk3399_clk_init(struct device_node *np) 
	rockchip_clk_register_branches(ctx, rk3399_clk_branches,

				  ARRAY_SIZE(rk3399_clk_branches));



	rockchip_clk_protect_critical(rk3399_cru_critical_clocks,

				      ARRAY_SIZE(rk3399_cru_critical_clocks));



	rockchip_clk_register_armclk(ctx, ARMCLKL, "armclkl",

			mux_armclkl_p, ARRAY_SIZE(mux_armclkl_p),

			&rk3399_cpuclkl_data, rk3399_cpuclkl_rates,
@@ -1562,6 +1562,9 @@ static void __init rk3399_clk_init(struct device_node *np) 
			&rk3399_cpuclkb_data, rk3399_cpuclkb_rates,

			ARRAY_SIZE(rk3399_cpuclkb_rates));



	rockchip_clk_protect_critical(rk3399_cru_critical_clocks,

				      ARRAY_SIZE(rk3399_cru_critical_clocks));



	rockchip_register_softrst(np, 21, reg_base + RK3399_SOFTRST_CON(0),

				  ROCKCHIP_SOFTRST_HIWORD_MASK);
@@ -1653,7 +1656,7 @@ static struct platform_driver clk_rk3399_driver = { 
		.suppress_bind_attrs = true,

	},

};

builtin_platform_driver_probe(clk_rk3399_driver, clk_rk3399_probe);

module_platform_driver_probe(clk_rk3399_driver, clk_rk3399_probe);



MODULE_DESCRIPTION("Rockchip RK3399 Clock Driver");

MODULE_LICENSE("GPL");

drivers/clk/rockchip/clk-rk3568.c

+1 −1
Original line number Diff line number Diff line
@@ -1719,7 +1719,7 @@ static struct platform_driver clk_rk3568_driver = { 
		.suppress_bind_attrs = true,

	},

};

builtin_platform_driver_probe(clk_rk3568_driver, clk_rk3568_probe);

module_platform_driver_probe(clk_rk3568_driver, clk_rk3568_probe);



MODULE_DESCRIPTION("Rockchip RK3568 Clock Driver");

MODULE_LICENSE("GPL");