Commit 8d2453d9 authored by Tony Lindgren's avatar Tony Lindgren
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ARM: dts: dra7: Fix suspend warning for vpe powerdomain 



We currently are getting the following warning after a system suspend:

Powerdomain (vpe_pwrdm) didn't enter target state 0

Looks like this is because the STANDBYMODE bit for SMART_IDLE should
not be used. The TRM "Table 12-348. VPE_SYSCONFIG" says that the value
for SMART_IDLE is "0x2: Same behavior as bit-field value of 0x1". But
if the SMART_IDLE value is used, PM_VPE_PWRSTST LASTPOWERSTATEENTERED
bits always show value of 3.

Let's fix the issue by dropping SMART_IDLE for vpe. And let's also add
the missing the powerdomain for vpe.

Fixes: 1a209516 ("ARM: dts: dra7: Add ti-sysc node for VPE")
Cc: Benoit Parrot <bparrot@ti.com>
Reported-by: default avatarKevin Hilman <khilman@baylibre.com>
Reviewed-by: default avatarKevin Hilman <khilman@baylibre.com>
Tested-by: default avatarKevin Hilman <khilman@baylibre.com>
Signed-off-by: default avatarTony Lindgren <tony@atomide.com>
parent a12315d6

arch/arm/boot/dts/dra7-l4.dtsi

+2 −2
Original line number Diff line number Diff line
@@ -4188,11 +4188,11 @@ 
			reg = <0x1d0010 0x4>;

			reg-names = "sysc";

			ti,sysc-midle = <SYSC_IDLE_FORCE>,

					<SYSC_IDLE_NO>,

					<SYSC_IDLE_SMART>;

					<SYSC_IDLE_NO>;

			ti,sysc-sidle = <SYSC_IDLE_FORCE>,

					<SYSC_IDLE_NO>,

					<SYSC_IDLE_SMART>;

			power-domains = <&prm_vpe>;

			clocks = <&vpe_clkctrl DRA7_VPE_VPE_CLKCTRL 0>;

			clock-names = "fck";

			#address-cells = <1>;