Commit 8d1ac895 authored by Liu, Changcheng's avatar Liu, Changcheng Committed by Saeed Mahameed
Browse files

net/mlx5: add IFC bits for bypassing port select flow table 



port_select_flow_table_bypass - When set, device supports
bypass port select flow table.
active_port - Bitmask indicates the current active ports
in PORT_SELECT_FT LAG.
MLX5_SET_HCA_CAP_OP_MODE_PORT_SELECTION - op_mod to operate
PORT_SELECTION_Capabilities.

Signed-off-by: default avatarLiu, Changcheng <jerrliu@nvidia.com>
Reviewed-by: default avatarMark Bloch <mbloch@nvidia.com>
Signed-off-by: default avatarSaeed Mahameed <saeedm@nvidia.com>
parent f0462bc3

include/linux/mlx5/mlx5_ifc.h

+7 −2
Original line number Diff line number Diff line
@@ -68,6 +68,7 @@ enum { 
	MLX5_SET_HCA_CAP_OP_MOD_ODP                   = 0x2,

	MLX5_SET_HCA_CAP_OP_MOD_ATOMIC                = 0x3,

	MLX5_SET_HCA_CAP_OP_MOD_ROCE                  = 0x4,

	MLX5_SET_HCA_CAP_OP_MODE_PORT_SELECTION       = 0x25,

};



enum {
@@ -814,7 +815,9 @@ struct mlx5_ifc_flow_table_nic_cap_bits { 
struct mlx5_ifc_port_selection_cap_bits {

	u8         reserved_at_0[0x10];

	u8         port_select_flow_table[0x1];

	u8         reserved_at_11[0xf];

	u8         reserved_at_11[0x1];

	u8         port_select_flow_table_bypass[0x1];

	u8         reserved_at_13[0xd];



	u8         reserved_at_20[0x1e0];
@@ -10933,7 +10936,9 @@ struct mlx5_ifc_lagc_bits { 
	u8         reserved_at_18[0x5];

	u8         lag_state[0x3];



	u8         reserved_at_20[0x14];

	u8         reserved_at_20[0xc];

	u8         active_port[0x4];

	u8         reserved_at_30[0x4];

	u8         tx_remap_affinity_2[0x4];

	u8         reserved_at_38[0x4];

	u8         tx_remap_affinity_1[0x4];