Unverified Commit 8d06b963 authored by Jiaxin Yu's avatar Jiaxin Yu Committed by Mark Brown
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ASoC: mediatek: mt8192: fix tdm out data is valid on rising edge 



This patch correct tdm out bck inverse register to AUDIO_TOP_CON3[3].

Signed-off-by: default avatarJiaxin Yu <jiaxin.yu@mediatek.com>
Link: https://lore.kernel.org/r/1615516005-781-1-git-send-email-jiaxin.yu@mediatek.com


Signed-off-by: default avatarMark Brown <broonie@kernel.org>
parent 9922f50f

sound/soc/mediatek/mt8192/mt8192-dai-tdm.c

+3 −1
Original line number Diff line number Diff line
@@ -555,7 +555,9 @@ static int mtk_dai_tdm_hw_params(struct snd_pcm_substream *substream, 


	/* set tdm */

	if (tdm_priv->bck_invert)

		tdm_con |= 1 << BCK_INVERSE_SFT;

		regmap_update_bits(afe->regmap, AUDIO_TOP_CON3,

				   BCK_INVERSE_MASK_SFT,

				   0x1 << BCK_INVERSE_SFT);



	if (tdm_priv->lck_invert)

		tdm_con |= 1 << LRCK_INVERSE_SFT;

sound/soc/mediatek/mt8192/mt8192-reg.h

+5 −3
Original line number Diff line number Diff line
@@ -21,6 +21,11 @@ enum { 
/*****************************************************************************

 *                  R E G I S T E R       D E F I N I T I O N

 *****************************************************************************/

/* AUDIO_TOP_CON3 */

#define BCK_INVERSE_SFT                              3

#define BCK_INVERSE_MASK                             0x1

#define BCK_INVERSE_MASK_SFT                         (0x1 << 3)



/* AFE_DAC_CON0 */

#define VUL12_ON_SFT                                   31

#define VUL12_ON_MASK                                  0x1
@@ -2079,9 +2084,6 @@ enum { 
#define TDM_EN_SFT                                     0

#define TDM_EN_MASK                                    0x1

#define TDM_EN_MASK_SFT                                (0x1 << 0)

#define BCK_INVERSE_SFT                                1

#define BCK_INVERSE_MASK                               0x1

#define BCK_INVERSE_MASK_SFT                           (0x1 << 1)

#define LRCK_INVERSE_SFT                               2

#define LRCK_INVERSE_MASK                              0x1

#define LRCK_INVERSE_MASK_SFT                          (0x1 << 2)