Commit 8c7d980d authored by Ben Skeggs's avatar Ben Skeggs
Browse files

drm/nouveau/disp: move DP MST payload config method 



Signed-off-by: default avatarBen Skeggs <bskeggs@redhat.com>
Reviewed-by: default avatarLyude Paul <lyude@redhat.com>
parent 8bb30c88

drivers/gpu/drm/nouveau/dispnv50/disp.c

+5 −21
Original line number Diff line number Diff line
@@ -884,16 +884,6 @@ nv50_msto_prepare(struct drm_atomic_state *state, 
	struct nv50_mstc *mstc = msto->mstc;

	struct nv50_mstm *mstm = mstc->mstm;

	struct drm_dp_mst_atomic_payload *payload;

	struct {

		struct nv50_disp_mthd_v1 base;

		struct nv50_disp_sor_dp_mst_vcpi_v0 vcpi;

	} args = {

		.base.version = 1,

		.base.method = NV50_DISP_MTHD_V1_SOR_DP_MST_VCPI,

		.base.hasht  = mstm->outp->dcb->hasht,

		.base.hashm  = (0xf0ff & mstm->outp->dcb->hashm) |

			       (0x0100 << msto->head->base.index),

	};



	NV_ATOMIC(drm, "%s: msto prepare\n", msto->encoder.name);
@@ -902,22 +892,16 @@ nv50_msto_prepare(struct drm_atomic_state *state, 
	// TODO: Figure out if we want to do a better job of handling VCPI allocation failures here?

	if (msto->disabled) {

		drm_dp_remove_payload(mgr, mst_state, payload);



		nvif_outp_dp_mst_vcpi(&mstm->outp->outp, msto->head->base.index, 0, 0, 0, 0);

	} else {

		if (msto->enabled)

			drm_dp_add_payload_part1(mgr, mst_state, payload);



		args.vcpi.start_slot = payload->vc_start_slot;

		args.vcpi.num_slots = payload->time_slots;

		args.vcpi.pbn = payload->pbn;

		args.vcpi.aligned_pbn = payload->time_slots * mst_state->pbn_div;

		nvif_outp_dp_mst_vcpi(&mstm->outp->outp, msto->head->base.index,

				      payload->vc_start_slot, payload->time_slots,

				      payload->pbn, payload->time_slots * mst_state->pbn_div);

	}



	NV_ATOMIC(drm, "%s: %s: %02x %02x %04x %04x\n",

		  msto->encoder.name, msto->head->base.base.name,

		  args.vcpi.start_slot, args.vcpi.num_slots,

		  args.vcpi.pbn, args.vcpi.aligned_pbn);



	nvif_mthd(&drm->display->disp.object, 0, &args, sizeof(args));

}



static int

drivers/gpu/drm/nouveau/include/nvif/cl5070.h

+0 −18
Original line number Diff line number Diff line
@@ -25,22 +25,4 @@ struct nv50_disp_scanoutpos_v0 { 
	__u16 htotal;

	__u16 hline;

};



struct nv50_disp_mthd_v1 {

	__u8  version;

#define NV50_DISP_MTHD_V1_SOR_DP_MST_VCPI                                  0x26

	__u8  method;

	__u16 hasht;

	__u16 hashm;

	__u8  pad06[2];

};



struct nv50_disp_sor_dp_mst_vcpi_v0 {

	__u8  version;

	__u8  pad01[1];

	__u8  start_slot;

	__u8  num_slots;

	__u16 pbn;

	__u16 aligned_pbn;

};

#endif

drivers/gpu/drm/nouveau/include/nvif/if0012.h

+12 −0
Original line number Diff line number Diff line
@@ -17,6 +17,7 @@ union nvif_outp_args { 
#define NVIF_OUTP_V0_HDA_ELD     0x04

#define NVIF_OUTP_V0_DP_AUX_PWR  0x05

#define NVIF_OUTP_V0_DP_RETRAIN  0x06

#define NVIF_OUTP_V0_DP_MST_VCPI 0x07



union nvif_outp_load_detect_args {

	struct nvif_outp_load_detect_v0 {
@@ -106,4 +107,15 @@ union nvif_outp_dp_retrain_args { 
	struct nvif_outp_dp_retrain_vn {

	} vn;

};



union nvif_outp_dp_mst_vcpi_args {

	struct nvif_outp_dp_mst_vcpi_v0 {

		__u8  version;

		__u8  head;

		__u8  start_slot;

		__u8  num_slots;

		__u16 pbn;

		__u16 aligned_pbn;

	} v0;

};

#endif

drivers/gpu/drm/nouveau/include/nvif/outp.h

+2 −0
Original line number Diff line number Diff line
@@ -28,4 +28,6 @@ int nvif_outp_infoframe(struct nvif_outp *, u8 type, struct nvif_outp_infoframe_ 
int nvif_outp_hda_eld(struct nvif_outp *, int head, void *data, u32 size);

int nvif_outp_dp_aux_pwr(struct nvif_outp *, bool enable);

int nvif_outp_dp_retrain(struct nvif_outp *);

int nvif_outp_dp_mst_vcpi(struct nvif_outp *, int head,

			  u8 start_slot, u8 num_slots, u16 pbn, u16 aligned_pbn);

#endif

drivers/gpu/drm/nouveau/nvif/outp.c

+21 −0
Original line number Diff line number Diff line
@@ -25,6 +25,27 @@ 


#include <nvif/class.h>



int

nvif_outp_dp_mst_vcpi(struct nvif_outp *outp, int head,

		      u8 start_slot, u8 num_slots, u16 pbn, u16 aligned_pbn)

{

	struct nvif_outp_dp_mst_vcpi_v0 args;

	int ret;



	args.version = 0;

	args.head = head;

	args.start_slot = start_slot;

	args.num_slots = num_slots;

	args.pbn = pbn;

	args.aligned_pbn = aligned_pbn;



	ret = nvif_object_mthd(&outp->object, NVIF_OUTP_V0_DP_MST_VCPI, &args, sizeof(args));

	NVIF_ERRON(ret, &outp->object,

		   "[DP_MST_VCPI head:%d start_slot:%02x num_slots:%02x pbn:%04x aligned_pbn:%04x]",

		   args.head, args.start_slot, args.num_slots, args.pbn, args.aligned_pbn);

	return ret;

}



int

nvif_outp_dp_retrain(struct nvif_outp *outp)

{