Commit 8c6e1055 authored by Mark Brown's avatar Mark Brown Committed by Catalin Marinas
Browse files

arm64/sysreg: Fix errors in 32 bit enumeration values



The recently converted 32 bit ID registers have errors in MVFR0_EL1.FPSP,
MVFR0_EL1.SIMDReg and MVFR1_EL1.SIMDHP where enumeration values which
should be 0b0010 are specified as 0b0001. Correct these.

Fixes: e79c94a2 ("arm64/sysreg: Convert MVFR0_EL1 to automatic generation")
Fixes: c9b718ed ("arm64/sysreg: Convert MVFR1_EL1 to automatic generation")
Reviewed-by: default avatarMark Rutland <mark.rutland@arm.com>
Signed-off-by: default avatarMark Brown <broonie@kernel.org>
Link: https://lore.kernel.org/r/20221207-arm64-sysreg-helpers-v3-2-0d71a7b174a8@kernel.org


Signed-off-by: default avatarCatalin Marinas <catalin.marinas@arm.com>
parent 50daf5b7
Loading
Loading
Loading
Loading
+4 −4
Original line number Diff line number Diff line
@@ -689,17 +689,17 @@ EndEnum
Enum	11:8	FPDP
	0b0000	NI
	0b0001	VFPv2
	0b0001	VFPv3
	0b0010	VFPv3
EndEnum
Enum	7:4	FPSP
	0b0000	NI
	0b0001	VFPv2
	0b0001	VFPv3
	0b0010	VFPv3
EndEnum
Enum	3:0	SIMDReg
	0b0000	NI
	0b0001	IMP_16x64
	0b0001	IMP_32x64
	0b0010	IMP_32x64
EndEnum
EndSysreg

@@ -718,7 +718,7 @@ EndEnum
Enum	23:20	SIMDHP
	0b0000	NI
	0b0001	SIMDHP
	0b0001	SIMDHP_FLOAT
	0b0010	SIMDHP_FLOAT
EndEnum
Enum	19:16	SIMDSP
	0b0000	NI