Commit 8c28d52c authored by Fuad Tabba's avatar Fuad Tabba Committed by Will Deacon
Browse files

arm64: sync_icache_aliases to take end parameter instead of size 



To be consistent with other functions with similar names and
functionality in cacheflush.h, cache.S, and cachetlb.rst, change
to specify the range in terms of start and end, as opposed to
start and size.

No functional change intended.

Reported-by: default avatarWill Deacon <will@kernel.org>
Acked-by: default avatarMark Rutland <mark.rutland@arm.com>
Signed-off-by: default avatarFuad Tabba <tabba@google.com>
Reviewed-by: default avatarArd Biesheuvel <ardb@kernel.org>
Link: https://lore.kernel.org/r/20210524083001.2586635-17-tabba@google.com


Signed-off-by: default avatarWill Deacon <will@kernel.org>
parent 406d7d4e

arch/arm64/include/asm/cacheflush.h

+1 −1
Original line number Diff line number Diff line
@@ -64,7 +64,7 @@ extern void __clean_dcache_area_poc(unsigned long start, unsigned long end); 
extern void __clean_dcache_area_pop(unsigned long start, unsigned long end);

extern void __clean_dcache_area_pou(unsigned long start, unsigned long end);

extern long __flush_cache_user_range(unsigned long start, unsigned long end);

extern void sync_icache_aliases(void *kaddr, unsigned long len);

extern void sync_icache_aliases(unsigned long start, unsigned long end);



static inline void flush_icache_range(unsigned long start, unsigned long end)

{

arch/arm64/kernel/probes/uprobes.c

+1 −1
Original line number Diff line number Diff line
@@ -21,7 +21,7 @@ void arch_uprobe_copy_ixol(struct page *page, unsigned long vaddr, 
	memcpy(dst, src, len);



	/* flush caches (dcache/icache) */

	sync_icache_aliases(dst, len);

	sync_icache_aliases((unsigned long)dst, (unsigned long)dst + len);



	kunmap_atomic(xol_page_kaddr);

}

arch/arm64/mm/flush.c

+10 −11
Original line number Diff line number Diff line
@@ -14,28 +14,25 @@ 
#include <asm/cache.h>

#include <asm/tlbflush.h>



void sync_icache_aliases(void *kaddr, unsigned long len)

void sync_icache_aliases(unsigned long start, unsigned long end)

{

	unsigned long addr = (unsigned long)kaddr;



	if (icache_is_aliasing()) {

		__clean_dcache_area_pou(kaddr, kaddr + len);

		__clean_dcache_area_pou(start, end);

		__flush_icache_all();

	} else {

		/*

		 * Don't issue kick_all_cpus_sync() after I-cache invalidation

		 * for user mappings.

		 */

		__flush_icache_range(addr, addr + len);

		__flush_icache_range(start, end);

	}

}



static void flush_ptrace_access(struct vm_area_struct *vma, struct page *page,

				unsigned long uaddr, void *kaddr,

				unsigned long len)

static void flush_ptrace_access(struct vm_area_struct *vma, unsigned long start,

				unsigned long end)

{

	if (vma->vm_flags & VM_EXEC)

		sync_icache_aliases(kaddr, len);

		sync_icache_aliases(start, end);

}



/*
@@ -48,7 +45,7 @@ void copy_to_user_page(struct vm_area_struct *vma, struct page *page, 
		       unsigned long len)

{

	memcpy(dst, src, len);

	flush_ptrace_access(vma, page, uaddr, dst, len);

	flush_ptrace_access(vma, (unsigned long)dst, (unsigned long)dst + len);

}



void __sync_icache_dcache(pte_t pte)
@@ -56,7 +53,9 @@ void __sync_icache_dcache(pte_t pte) 
	struct page *page = pte_page(pte);



	if (!test_bit(PG_dcache_clean, &page->flags)) {

		sync_icache_aliases(page_address(page), page_size(page));

		sync_icache_aliases((unsigned long)page_address(page),

				    (unsigned long)page_address(page) +

					    page_size(page));

		set_bit(PG_dcache_clean, &page->flags);

	}

}