Commit 8c16dc04 authored by Andi Kleen's avatar Andi Kleen Committed by Peter Zijlstra
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x86/perf: Avoid warning for Arch LBR without XSAVE 



Some hypervisors support Arch LBR, but without the LBR XSAVE support.
The current Arch LBR init code prints a warning when the xsave size (0) is
unexpected. Avoid printing the warning for the "no LBR XSAVE" case.

Signed-off-by: default avatarAndi Kleen <ak@linux.intel.com>
Signed-off-by: default avatarPeter Zijlstra (Intel) <peterz@infradead.org>
Link: https://lkml.kernel.org/r/20211215204029.150686-1-ak@linux.intel.com
parent 5a4487f9

arch/x86/events/intel/lbr.c

+3 −0
Original line number Diff line number Diff line
@@ -1751,6 +1751,9 @@ static bool is_arch_lbr_xsave_available(void) 
	 * Check the LBR state with the corresponding software structure.

	 * Disable LBR XSAVES support if the size doesn't match.

	 */

	if (xfeature_size(XFEATURE_LBR) == 0)

		return false;



	if (WARN_ON(xfeature_size(XFEATURE_LBR) != get_lbr_state_size()))

		return false;