Commit 8b70b5fe authored by Dave Airlie's avatar Dave Airlie
Browse files

Merge tag 'drm-misc-next-2021-12-16' of git://anongit.freedesktop.org/drm/drm-misc into drm-next 



drm-misc-next for 5.17:

UAPI Changes:

 * vmwgfx: Version bump to 2.20

Cross-subsystem Changes:

 * of: Create simple-framebuffer devices in of_platform_default_init()

Core Changes:

 * Replace include <linux/kernel.h> with more fine-grained includes
 * Document DRM_IOCTL_MODE_GETFB2
 * format-helper: Support XRGB2101010 source buffers

Driver Changes:

 * amdgpu: Fix runtime PM on some configs
 * ast: Fix I2C initialization
 * bridge: ti-sn65dsi86: Set regmap max_register
 * panel: Add Team Source Display TST043015CMHX plus DT bindings
 * simpledrm: Add support for Apple M1
 * sprd: Add various drivers plus DT bindings
 * vc4: Support 10-bit YUV 4:2:0 output; Fix clock-rate updates
 * vmwgfx: Implement GEM support; Implement GL 4.3 support

Signed-off-by: default avatarDave Airlie <airlied@redhat.com>

From: Thomas Zimmermann <tzimmermann@suse.de>
Link: https://patchwork.freedesktop.org/patch/msgid/YbtOaZLvar+9hBOi@linux-uq9g.fritz.box
parents eacef9fd 9758ff2f

Documentation/devicetree/bindings/display/bridge/lvds-codec.yaml

+18 −0
Original line number Diff line number Diff line
@@ -79,6 +79,14 @@ properties: 
      - port@0

      - port@1



  pclk-sample:

    description:

      Data sampling on rising or falling edge.

    enum:

      - 0  # Falling edge

      - 1  # Rising edge

    default: 0



  powerdown-gpios:

    description:

      The GPIO used to control the power down line of this device.
@@ -102,6 +110,16 @@ then: 
              properties:

                data-mapping: false



if:

  not:

    properties:

      compatible:

        contains:

          const: lvds-encoder

then:

  properties:

    pclk-sample: false



required:

  - compatible

  - ports

Documentation/devicetree/bindings/display/panel/panel-simple.yaml

+2 −0
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@@ -290,6 +290,8 @@ properties: 
      - starry,kr070pe2t

        # Starry 12.2" (1920x1200 pixels) TFT LCD panel

      - starry,kr122ea0sra

        # Team Source Display Technology TST043015CMHX 4.3" WQVGA TFT LCD panel

      - team-source-display,tst043015cmhx

        # Tianma Micro-electronics TM070JDHG30 7.0" WXGA TFT LCD panel

      - tianma,tm070jdhg30

        # Tianma Micro-electronics TM070JVHG33 7.0" WXGA TFT LCD panel

Documentation/devicetree/bindings/display/sprd/sprd,display-subsystem.yaml

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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)

%YAML 1.2

---

$id: http://devicetree.org/schemas/display/sprd/sprd,display-subsystem.yaml#

$schema: http://devicetree.org/meta-schemas/core.yaml#



title: Unisoc DRM master device



maintainers:

  - Kevin Tang <kevin.tang@unisoc.com>



description: |

  The Unisoc DRM master device is a virtual device needed to list all

  DPU devices or other display interface nodes that comprise the

  graphics subsystem.



  Unisoc's display pipeline have several components as below description,

  multi display controllers and corresponding physical interfaces.

  For different display scenarios, dpu0 and dpu1 maybe binding to different

  encoder.



  E.g:

  dpu0 and dpu1 both binding to DSI for dual mipi-dsi display;

  dpu0 binding to DSI for primary display, and dpu1 binding to DP for external display;



          +-----------------------------------------+

          |                                         |

          |                            +---------+  |

  +----+  |   +----+    +---------+    |DPHY/CPHY|  |   +------+

  |    +----->+dpu0+--->+MIPI|DSI +--->+Combo    +----->+Panel0|

  |AXI |  |   +----+    +---------+    +---------+  |   +------+

  |    |  |                  ^                      |

  |    |  |                  |                      |

  |    |  |      +-----------+                      |

  |    |  |      |                                  |

  |APB |  |   +--+-+    +-----------+    +---+      |   +------+

  |    +----->+dpu1+--->+DisplayPort+--->+PHY+--------->+Panel1|

  |    |  |   +----+    +-----------+    +---+      |   +------+

  +----+  |                                         |

          +-----------------------------------------+



properties:

  compatible:

    const: sprd,display-subsystem



  ports:

    $ref: /schemas/types.yaml#/definitions/phandle-array

    description:

      Should contain a list of phandles pointing to display interface port

      of DPU devices.



required:

  - compatible

  - ports



additionalProperties: false



examples:

  - |

    display-subsystem {

        compatible = "sprd,display-subsystem";

        ports = <&dpu_out>;

    };

Documentation/devicetree/bindings/display/sprd/sprd,sharkl3-dpu.yaml

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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)

%YAML 1.2

---

$id: http://devicetree.org/schemas/display/sprd/sprd,sharkl3-dpu.yaml#

$schema: http://devicetree.org/meta-schemas/core.yaml#



title: Unisoc Sharkl3 Display Processor Unit (DPU)



maintainers:

  - Kevin Tang <kevin.tang@unisoc.com>



description: |

  DPU (Display Processor Unit) is the Display Controller for the Unisoc SoCs

  which transfers the image data from a video memory buffer to an internal

  LCD interface.



properties:

  compatible:

    const: sprd,sharkl3-dpu



  reg:

    maxItems: 1



  interrupts:

    maxItems: 1



  clocks:

    minItems: 2



  clock-names:

    items:

      - const: clk_src_128m

      - const: clk_src_384m



  power-domains:

    maxItems: 1



  iommus:

    maxItems: 1



  port:

    type: object

    description:

      A port node with endpoint definitions as defined in

      Documentation/devicetree/bindings/media/video-interfaces.txt.

      That port should be the output endpoint, usually output to

      the associated DSI.



required:

  - compatible

  - reg

  - interrupts

  - clocks

  - clock-names

  - port



additionalProperties: false



examples:

  - |

    #include <dt-bindings/interrupt-controller/arm-gic.h>

    #include <dt-bindings/clock/sprd,sc9860-clk.h>

    dpu: dpu@63000000 {

        compatible = "sprd,sharkl3-dpu";

        reg = <0x63000000 0x1000>;

        interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;

        clock-names = "clk_src_128m", "clk_src_384m";



        clocks = <&pll CLK_TWPLL_128M>,

          <&pll CLK_TWPLL_384M>;



        dpu_port: port {

            dpu_out: endpoint {

                remote-endpoint = <&dsi_in>;

            };

        };

    };

Documentation/devicetree/bindings/display/sprd/sprd,sharkl3-dsi-host.yaml

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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)

%YAML 1.2

---

$id: http://devicetree.org/schemas/display/sprd/sprd,sharkl3-dsi-host.yaml#

$schema: http://devicetree.org/meta-schemas/core.yaml#



title: Unisoc MIPI DSI Controller



maintainers:

  - Kevin Tang <kevin.tang@unisoc.com>



properties:

  compatible:

    const: sprd,sharkl3-dsi-host



  reg:

    maxItems: 1



  interrupts:

    maxItems: 2



  clocks:

    minItems: 1



  clock-names:

    items:

      - const: clk_src_96m



  power-domains:

    maxItems: 1



  ports:

    type: object



    properties:

      "#address-cells":

        const: 1



      "#size-cells":

        const: 0



      port@0:

        type: object

        description:

          A port node with endpoint definitions as defined in

          Documentation/devicetree/bindings/media/video-interfaces.txt.

          That port should be the input endpoint, usually coming from

          the associated DPU.



    required:

      - "#address-cells"

      - "#size-cells"

      - port@0



    additionalProperties: false



required:

  - compatible

  - reg

  - interrupts

  - clocks

  - clock-names

  - ports



additionalProperties: false



examples:

  - |

    #include <dt-bindings/interrupt-controller/arm-gic.h>

    #include <dt-bindings/clock/sprd,sc9860-clk.h>

    dsi: dsi@63100000 {

        compatible = "sprd,sharkl3-dsi-host";

        reg = <0x63100000 0x1000>;

        interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>,

          <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;

        clock-names = "clk_src_96m";

        clocks = <&pll CLK_TWPLL_96M>;

        ports {

            #address-cells = <1>;

            #size-cells = <0>;

            port@0 {

                reg = <0>;

                dsi_in: endpoint {

                    remote-endpoint = <&dpu_out>;

                };

            };

        };

    };