Commit 8b449f1c authored by Matt Roper's avatar Matt Roper
Browse files

drm/i915/pvc: Extract stepping information from PCI revid 



For PVC, the base die and compute tile have separate stepping values
that we need to track; we'll use the existing graphics_step field to
represent the compute tile stepping and add a new 'basedie_step' field.

Unlike past platforms, steppings for these components are represented by
specific bitfields within the PCI revision ID, and we shouldn't make
assumptions about the non-CT, non-BD bits staying 0.  Let's update our
stepping code accordingly.

Bspec: 44484
Signed-off-by: default avatarMatt Roper <matthew.d.roper@intel.com>
Reviewed-by: default avatarMatt Atwood <matthew.s.atwood@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220527163348.1936146-2-matthew.d.roper@intel.com
parent 420a07b8

drivers/gpu/drm/i915/i915_drv.h

+13 −0
Original line number Diff line number Diff line
@@ -943,6 +943,7 @@ static inline struct intel_gt *to_gt(struct drm_i915_private *i915) 
#define INTEL_DISPLAY_STEP(__i915) (RUNTIME_INFO(__i915)->step.display_step)

#define INTEL_GRAPHICS_STEP(__i915) (RUNTIME_INFO(__i915)->step.graphics_step)

#define INTEL_MEDIA_STEP(__i915) (RUNTIME_INFO(__i915)->step.media_step)

#define INTEL_BASEDIE_STEP(__i915) (RUNTIME_INFO(__i915)->step.basedie_step)



#define IS_DISPLAY_STEP(__i915, since, until) \

	(drm_WARN_ON(&(__i915)->drm, INTEL_DISPLAY_STEP(__i915) == STEP_NONE), \
@@ -956,6 +957,10 @@ static inline struct intel_gt *to_gt(struct drm_i915_private *i915) 
	(drm_WARN_ON(&(__i915)->drm, INTEL_MEDIA_STEP(__i915) == STEP_NONE), \

	 INTEL_MEDIA_STEP(__i915) >= (since) && INTEL_MEDIA_STEP(__i915) < (until))



#define IS_BASEDIE_STEP(__i915, since, until) \

	(drm_WARN_ON(&(__i915)->drm, INTEL_BASEDIE_STEP(__i915) == STEP_NONE), \

	 INTEL_BASEDIE_STEP(__i915) >= (since) && INTEL_BASEDIE_STEP(__i915) < (until))



static __always_inline unsigned int

__platform_mask_index(const struct intel_runtime_info *info,

		      enum intel_platform p)
@@ -1208,6 +1213,14 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915, 
	(IS_DG2(__i915) && \

	 IS_DISPLAY_STEP(__i915, since, until))



#define IS_PVC_BD_STEP(__i915, since, until) \

	(IS_PONTEVECCHIO(__i915) && \

	 IS_BASEDIE_STEP(__i915, since, until))



#define IS_PVC_CT_STEP(__i915, since, until) \

	(IS_PONTEVECCHIO(__i915) && \

	 IS_GRAPHICS_STEP(__i915, since, until))



#define IS_LP(dev_priv)		(INTEL_INFO(dev_priv)->is_lp)

#define IS_GEN9_LP(dev_priv)	(GRAPHICS_VER(dev_priv) == 9 && IS_LP(dev_priv))

#define IS_GEN9_BC(dev_priv)	(GRAPHICS_VER(dev_priv) == 9 && !IS_LP(dev_priv))

drivers/gpu/drm/i915/intel_step.c

+69 −1
Original line number Diff line number Diff line
@@ -135,6 +135,8 @@ static const struct intel_step_info adlp_n_revids[] = { 
	[0x0] = { COMMON_GT_MEDIA_STEP(A0), .display_step = STEP_D0 },

};



static void pvc_step_init(struct drm_i915_private *i915, int pci_revid);



void intel_step_init(struct drm_i915_private *i915)

{

	const struct intel_step_info *revids = NULL;
@@ -142,7 +144,10 @@ void intel_step_init(struct drm_i915_private *i915) 
	int revid = INTEL_REVID(i915);

	struct intel_step_info step = {};



	if (IS_DG2_G10(i915)) {

	if (IS_PONTEVECCHIO(i915)) {

		pvc_step_init(i915, revid);

		return;

	} else if (IS_DG2_G10(i915)) {

		revids = dg2_g10_revid_step_tbl;

		size = ARRAY_SIZE(dg2_g10_revid_step_tbl);

	} else if (IS_DG2_G11(i915)) {
@@ -235,6 +240,69 @@ void intel_step_init(struct drm_i915_private *i915) 
	RUNTIME_INFO(i915)->step = step;

}



#define PVC_BD_REVID	GENMASK(5, 3)

#define PVC_CT_REVID	GENMASK(2, 0)



static const int pvc_bd_subids[] = {

	[0x0] = STEP_A0,

	[0x3] = STEP_B0,

	[0x4] = STEP_B1,

	[0x5] = STEP_B3,

};



static const int pvc_ct_subids[] = {

	[0x3] = STEP_A0,

	[0x5] = STEP_B0,

	[0x6] = STEP_B1,

	[0x7] = STEP_C0,

};



static int

pvc_step_lookup(struct drm_i915_private *i915, const char *type,

		const int *table, int size, int subid)

{

	if (subid < size && table[subid] != STEP_NONE)

		return table[subid];



	drm_warn(&i915->drm, "Unknown %s id 0x%02x\n", type, subid);



	/*

	 * As on other platforms, try to use the next higher ID if we land on a

	 * gap in the table.

	 */

	while (subid < size && table[subid] == STEP_NONE)

		subid++;



	if (subid < size) {

		drm_dbg(&i915->drm, "Using steppings for %s id 0x%02x\n",

			type, subid);

		return table[subid];

	}



	drm_dbg(&i915->drm, "Using future steppings\n");

	return STEP_FUTURE;

}



/*

 * PVC needs special handling since we don't lookup the

 * revid in a table, but rather specific bitfields within

 * the revid for various components.

 */

static void pvc_step_init(struct drm_i915_private *i915, int pci_revid)

{

	int ct_subid, bd_subid;



	bd_subid = FIELD_GET(PVC_BD_REVID, pci_revid);

	ct_subid = FIELD_GET(PVC_CT_REVID, pci_revid);



	RUNTIME_INFO(i915)->step.basedie_step =

		pvc_step_lookup(i915, "Base Die", pvc_bd_subids,

				ARRAY_SIZE(pvc_bd_subids), bd_subid);

	RUNTIME_INFO(i915)->step.graphics_step =

		pvc_step_lookup(i915, "Compute Tile", pvc_ct_subids,

				ARRAY_SIZE(pvc_ct_subids), ct_subid);

}



#define STEP_NAME_CASE(name)	\

	case STEP_##name:	\

		return #name;

drivers/gpu/drm/i915/intel_step.h

+3 −1
Original line number Diff line number Diff line
@@ -11,9 +11,10 @@ 
struct drm_i915_private;



struct intel_step_info {

	u8 graphics_step;

	u8 graphics_step;	/* Represents the compute tile on Xe_HPC */

	u8 display_step;

	u8 media_step;

	u8 basedie_step;

};



#define STEP_ENUM_VAL(name)  STEP_##name,
@@ -25,6 +26,7 @@ struct intel_step_info { 
	func(B0)			\

	func(B1)			\

	func(B2)			\

	func(B3)			\

	func(C0)			\

	func(C1)			\

	func(D0)			\