Commit 8b233a83 authored by Dave Airlie's avatar Dave Airlie
Browse files

Merge tag 'drm-msm-fixes-2021-11-28' of https://gitlab.freedesktop.org/drm/msm into drm-fixes 



msm misc fixes, build, display

Signed-off-by: default avatarDave Airlie <airlied@redhat.com>
From: Rob Clark <robdclark@gmail.com>
Link: https://patchwork.freedesktop.org/patch/msgid/CAF6AEGsV-ntO_u323XMKuD6bgbgvXporwi1sbyXwNDAuA52Afw@mail.gmail.com
parents d58071a8 afece15a

drivers/gpu/drm/msm/Kconfig

+1 −1
Original line number Diff line number Diff line
@@ -4,8 +4,8 @@ config DRM_MSM 
	tristate "MSM DRM"

	depends on DRM

	depends on ARCH_QCOM || SOC_IMX5 || COMPILE_TEST

	depends on COMMON_CLK

	depends on IOMMU_SUPPORT

	depends on (OF && COMMON_CLK) || COMPILE_TEST

	depends on QCOM_OCMEM || QCOM_OCMEM=n

	depends on QCOM_LLCC || QCOM_LLCC=n

	depends on QCOM_COMMAND_DB || QCOM_COMMAND_DB=n

drivers/gpu/drm/msm/Makefile

+3 −3
Original line number Diff line number Diff line
@@ -23,8 +23,10 @@ msm-y := \ 
	hdmi/hdmi_i2c.o \

	hdmi/hdmi_phy.o \

	hdmi/hdmi_phy_8960.o \

	hdmi/hdmi_phy_8996.o \

	hdmi/hdmi_phy_8x60.o \

	hdmi/hdmi_phy_8x74.o \

	hdmi/hdmi_pll_8960.o \

	edp/edp.o \

	edp/edp_aux.o \

	edp/edp_bridge.o \
@@ -37,6 +39,7 @@ msm-y := \ 
	disp/mdp4/mdp4_dtv_encoder.o \

	disp/mdp4/mdp4_lcdc_encoder.o \

	disp/mdp4/mdp4_lvds_connector.o \

	disp/mdp4/mdp4_lvds_pll.o \

	disp/mdp4/mdp4_irq.o \

	disp/mdp4/mdp4_kms.o \

	disp/mdp4/mdp4_plane.o \
@@ -116,9 +119,6 @@ msm-$(CONFIG_DRM_MSM_DP)+= dp/dp_aux.o \ 
	dp/dp_audio.o



msm-$(CONFIG_DRM_FBDEV_EMULATION) += msm_fbdev.o

msm-$(CONFIG_COMMON_CLK) += disp/mdp4/mdp4_lvds_pll.o

msm-$(CONFIG_COMMON_CLK) += hdmi/hdmi_pll_8960.o

msm-$(CONFIG_COMMON_CLK) += hdmi/hdmi_phy_8996.o



msm-$(CONFIG_DRM_MSM_HDMI_HDCP) += hdmi/hdmi_hdcp.o

drivers/gpu/drm/msm/adreno/a6xx_gpu.c

+10 −10
Original line number Diff line number Diff line
@@ -1424,17 +1424,24 @@ static void a6xx_llc_activate(struct a6xx_gpu *a6xx_gpu) 
{

	struct adreno_gpu *adreno_gpu = &a6xx_gpu->base;

	struct msm_gpu *gpu = &adreno_gpu->base;

	u32 gpu_scid, cntl1_regval = 0;

	u32 cntl1_regval = 0;



	if (IS_ERR(a6xx_gpu->llc_mmio))

		return;



	if (!llcc_slice_activate(a6xx_gpu->llc_slice)) {

		gpu_scid = llcc_get_slice_id(a6xx_gpu->llc_slice);

		u32 gpu_scid = llcc_get_slice_id(a6xx_gpu->llc_slice);



		gpu_scid &= 0x1f;

		cntl1_regval = (gpu_scid << 0) | (gpu_scid << 5) | (gpu_scid << 10) |

			       (gpu_scid << 15) | (gpu_scid << 20);



		/* On A660, the SCID programming for UCHE traffic is done in

		 * A6XX_GBIF_SCACHE_CNTL0[14:10]

		 */

		if (adreno_is_a660_family(adreno_gpu))

			gpu_rmw(gpu, REG_A6XX_GBIF_SCACHE_CNTL0, (0x1f << 10) |

				(1 << 8), (gpu_scid << 10) | (1 << 8));

	}



	/*
@@ -1471,13 +1478,6 @@ static void a6xx_llc_activate(struct a6xx_gpu *a6xx_gpu) 
	}



	gpu_rmw(gpu, REG_A6XX_GBIF_SCACHE_CNTL1, GENMASK(24, 0), cntl1_regval);



	/* On A660, the SCID programming for UCHE traffic is done in

	 * A6XX_GBIF_SCACHE_CNTL0[14:10]

	 */

	if (adreno_is_a660_family(adreno_gpu))

		gpu_rmw(gpu, REG_A6XX_GBIF_SCACHE_CNTL0, (0x1f << 10) |

			(1 << 8), (gpu_scid << 10) | (1 << 8));

}



static void a6xx_llc_slices_destroy(struct a6xx_gpu *a6xx_gpu)
@@ -1640,7 +1640,7 @@ static unsigned long a6xx_gpu_busy(struct msm_gpu *gpu) 
	return (unsigned long)busy_time;

}



void a6xx_gpu_set_freq(struct msm_gpu *gpu, struct dev_pm_opp *opp)

static void a6xx_gpu_set_freq(struct msm_gpu *gpu, struct dev_pm_opp *opp)

{

	struct adreno_gpu *adreno_gpu = to_adreno_gpu(gpu);

	struct a6xx_gpu *a6xx_gpu = to_a6xx_gpu(adreno_gpu);

drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c

+2 −2
Original line number Diff line number Diff line
@@ -777,12 +777,12 @@ static void a6xx_get_gmu_registers(struct msm_gpu *gpu, 
	struct a6xx_gpu *a6xx_gpu = to_a6xx_gpu(adreno_gpu);



	a6xx_state->gmu_registers = state_kcalloc(a6xx_state,

		2, sizeof(*a6xx_state->gmu_registers));

		3, sizeof(*a6xx_state->gmu_registers));



	if (!a6xx_state->gmu_registers)

		return;



	a6xx_state->nr_gmu_registers = 2;

	a6xx_state->nr_gmu_registers = 3;



	/* Get the CX GMU registers from AHB */

	_a6xx_get_gmu_registers(gpu, a6xx_state, &a6xx_gmu_reglist[0],

drivers/gpu/drm/msm/dp/dp_aux.c

+17 −0
Original line number Diff line number Diff line
@@ -33,6 +33,7 @@ struct dp_aux_private { 
	bool read;

	bool no_send_addr;

	bool no_send_stop;

	bool initted;

	u32 offset;

	u32 segment;
@@ -331,6 +332,10 @@ static ssize_t dp_aux_transfer(struct drm_dp_aux *dp_aux, 
	}



	mutex_lock(&aux->mutex);

	if (!aux->initted) {

		ret = -EIO;

		goto exit;

	}



	dp_aux_update_offset_and_segment(aux, msg);

	dp_aux_transfer_helper(aux, msg, true);
@@ -380,6 +385,8 @@ static ssize_t dp_aux_transfer(struct drm_dp_aux *dp_aux, 
	}



	aux->cmd_busy = false;



exit:

	mutex_unlock(&aux->mutex);



	return ret;
@@ -431,8 +438,13 @@ void dp_aux_init(struct drm_dp_aux *dp_aux) 


	aux = container_of(dp_aux, struct dp_aux_private, dp_aux);



	mutex_lock(&aux->mutex);



	dp_catalog_aux_enable(aux->catalog, true);

	aux->retry_cnt = 0;

	aux->initted = true;



	mutex_unlock(&aux->mutex);

}



void dp_aux_deinit(struct drm_dp_aux *dp_aux)
@@ -441,7 +453,12 @@ void dp_aux_deinit(struct drm_dp_aux *dp_aux) 


	aux = container_of(dp_aux, struct dp_aux_private, dp_aux);



	mutex_lock(&aux->mutex);



	aux->initted = false;

	dp_catalog_aux_enable(aux->catalog, false);



	mutex_unlock(&aux->mutex);

}



int dp_aux_register(struct drm_dp_aux *dp_aux)