Commit 8aad66aa authored by Conor Dooley's avatar Conor Dooley Committed by Jakub Kicinski
Browse files

net: macb: add polarfire soc reset support 



To date, the Microchip PolarFire SoC (MPFS) has been using the
cdns,macb compatible, however the generic device does not have reset
support. Add a new compatible & .data for MPFS to hook into the reset
functionality added for zynqmp support (and make the zynqmp init
function generic in the process).

Reviewed-by: default avatarClaudiu Beznea <claudiu.beznea@microchip.com>
Signed-off-by: default avatarConor Dooley <conor.dooley@microchip.com>
Signed-off-by: default avatarJakub Kicinski <kuba@kernel.org>
parent b09c6f8f

drivers/net/ethernet/cadence/macb_main.c

+18 −8
Original line number Diff line number Diff line
@@ -4689,34 +4689,32 @@ static const struct macb_config np4_config = { 
	.usrio = &macb_default_usrio,

};



static int zynqmp_init(struct platform_device *pdev)

static int init_reset_optional(struct platform_device *pdev)

{

	struct net_device *dev = platform_get_drvdata(pdev);

	struct macb *bp = netdev_priv(dev);

	int ret;



	if (bp->phy_interface == PHY_INTERFACE_MODE_SGMII) {

		/* Ensure PS-GTR PHY device used in SGMII mode is ready */

		/* Ensure PHY device used in SGMII mode is ready */

		bp->sgmii_phy = devm_phy_optional_get(&pdev->dev, NULL);



		if (IS_ERR(bp->sgmii_phy)) {

			ret = PTR_ERR(bp->sgmii_phy);

			dev_err_probe(&pdev->dev, ret,

				      "failed to get PS-GTR PHY\n");

				      "failed to get SGMII PHY\n");

			return ret;

		}



		ret = phy_init(bp->sgmii_phy);

		if (ret) {

			dev_err(&pdev->dev, "failed to init PS-GTR PHY: %d\n",

			dev_err(&pdev->dev, "failed to init SGMII PHY: %d\n",

				ret);

			return ret;

		}

	}



	/* Fully reset GEM controller at hardware level using zynqmp-reset driver,

	 * if mapped in device tree.

	 */

	/* Fully reset controller at hardware level if mapped in device tree */

	ret = device_reset_optional(&pdev->dev);

	if (ret) {

		dev_err_probe(&pdev->dev, ret, "failed to reset controller");
@@ -4737,7 +4735,7 @@ static const struct macb_config zynqmp_config = { 
			MACB_CAPS_GEM_HAS_PTP | MACB_CAPS_BD_RD_PREFETCH,

	.dma_burst_length = 16,

	.clk_init = macb_clk_init,

	.init = zynqmp_init,

	.init = init_reset_optional,

	.jumbo_max_len = 10240,

	.usrio = &macb_default_usrio,

};
@@ -4751,6 +4749,17 @@ static const struct macb_config zynq_config = { 
	.usrio = &macb_default_usrio,

};



static const struct macb_config mpfs_config = {

	.caps = MACB_CAPS_GIGABIT_MODE_AVAILABLE |

		MACB_CAPS_JUMBO |

		MACB_CAPS_GEM_HAS_PTP,

	.dma_burst_length = 16,

	.clk_init = macb_clk_init,

	.init = init_reset_optional,

	.usrio = &macb_default_usrio,

	.jumbo_max_len = 10240,

};



static const struct macb_config sama7g5_gem_config = {

	.caps = MACB_CAPS_GIGABIT_MODE_AVAILABLE | MACB_CAPS_CLK_HW_CHG |

		MACB_CAPS_MIIONRGMII,
@@ -4787,6 +4796,7 @@ static const struct of_device_id macb_dt_ids[] = { 
	{ .compatible = "cdns,zynqmp-gem", .data = &zynqmp_config},

	{ .compatible = "cdns,zynq-gem", .data = &zynq_config },

	{ .compatible = "sifive,fu540-c000-gem", .data = &fu540_c000_config },

	{ .compatible = "microchip,mpfs-macb", .data = &mpfs_config },

	{ .compatible = "microchip,sama7g5-gem", .data = &sama7g5_gem_config },

	{ .compatible = "microchip,sama7g5-emac", .data = &sama7g5_emac_config },

	{ /* sentinel */ }