Commit 8aa0fb0f authored by Ard Biesheuvel's avatar Ard Biesheuvel
Browse files

riscv: rely on core code to keep thread_info::cpu updated 



Now that the core code switched back to using thread_info::cpu to keep
a task's CPU number, we no longer need to keep it in sync explicitly. So
just drop the code that does this.

Signed-off-by: default avatarArd Biesheuvel <ardb@kernel.org>
Acked-by: default avatarPalmer Dabbelt <palmerdabbelt@google.com>
Acked-by: default avatarMark Rutland <mark.rutland@arm.com>
parent 336868af

arch/riscv/kernel/asm-offsets.c

+0 −1
Original line number Diff line number Diff line
@@ -33,7 +33,6 @@ void asm_offsets(void) 
	OFFSET(TASK_TI_PREEMPT_COUNT, task_struct, thread_info.preempt_count);

	OFFSET(TASK_TI_KERNEL_SP, task_struct, thread_info.kernel_sp);

	OFFSET(TASK_TI_USER_SP, task_struct, thread_info.user_sp);

	OFFSET(TASK_TI_CPU, task_struct, thread_info.cpu);



	OFFSET(TASK_THREAD_F0,  task_struct, thread.fstate.f[0]);

	OFFSET(TASK_THREAD_F1,  task_struct, thread.fstate.f[1]);

arch/riscv/kernel/entry.S

+0 −5
Original line number Diff line number Diff line
@@ -544,11 +544,6 @@ ENTRY(__switch_to) 
	REG_L s9,  TASK_THREAD_S9_RA(a4)

	REG_L s10, TASK_THREAD_S10_RA(a4)

	REG_L s11, TASK_THREAD_S11_RA(a4)

	/* Swap the CPU entry around. */

	lw a3, TASK_TI_CPU(a0)

	lw a4, TASK_TI_CPU(a1)

	sw a3, TASK_TI_CPU(a1)

	sw a4, TASK_TI_CPU(a0)

	/* The offset of thread_info in task_struct is zero. */

	move tp, a1

	ret

arch/riscv/kernel/head.S

+0 −1
Original line number Diff line number Diff line
@@ -317,7 +317,6 @@ clear_bss_done: 
	call setup_trap_vector

	/* Restore C environment */

	la tp, init_task

	sw zero, TASK_TI_CPU(tp)

	la sp, init_thread_union + THREAD_SIZE



#ifdef CONFIG_KASAN