Commit 89dc65a7 authored by Conor Dooley's avatar Conor Dooley Committed by Stephen Boyd
Browse files

clk: k210: remove an implicit 64-bit division 



The K210 clock driver depends on SOC_CANAAN, which is only selectable
when !MMU on RISC-V. !MMU is not possible on 32-bit yet, but patches
have been sent for its enabling. The kernel test robot reported this
implicit 64-bit division there.

Replace the implicit division with an explicit one.

Reported-by: default avatarkernel test robot <lkp@intel.com>
Link: https://lore.kernel.org/linux-riscv/202301201538.zNlqgE4L-lkp@intel.com/


Signed-off-by: default avatarConor Dooley <conor.dooley@microchip.com>
Signed-off-by: default avatarJesse Taube <Mr.Bossman075@gmail.com>
Link: https://lore.kernel.org/r/20230301002657.352637-2-Mr.Bossman075@gmail.com


Reviewed-by: default avatarDamien Le Moal <damien.lemoal@opensource.wdc.com>
Signed-off-by: default avatarStephen Boyd <sboyd@kernel.org>
parent 26243872

drivers/clk/clk-k210.c

+1 −1
Original line number Diff line number Diff line
@@ -495,7 +495,7 @@ static unsigned long k210_pll_get_rate(struct clk_hw *hw, 
	f = FIELD_GET(K210_PLL_CLKF, reg) + 1;

	od = FIELD_GET(K210_PLL_CLKOD, reg) + 1;



	return (u64)parent_rate * f / (r * od);

	return div_u64((u64)parent_rate * f, r * od);

}



static const struct clk_ops k210_pll_ops = {