Commit 89c68b10 authored by Stephen Boyd's avatar Stephen Boyd Committed by Linus Walleij
Browse files

pinctrl: qcom: spmi-mpp: Fix drive strength setting 



It looks like we parse the drive strength setting here, but never
actually write it into the hardware to update it. Parse the setting and
then write it at the end of the pinconf setting function so that it
actually sticks in the hardware.

Fixes: 0e948042 ("pinctrl: qcom: spmi-mpp: Implement support for sink mode")
Cc: Doug Anderson <dianders@chromium.org>
Signed-off-by: default avatarStephen Boyd <swboyd@chromium.org>
Reviewed-by: default avatarBjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: default avatarLinus Walleij <linus.walleij@linaro.org>
parent 9ae4987e

drivers/pinctrl/qcom/pinctrl-spmi-mpp.c

+5 −1
Original line number Diff line number Diff line
@@ -460,7 +460,7 @@ static int pmic_mpp_config_set(struct pinctrl_dev *pctldev, unsigned int pin, 
			pad->dtest = arg;

			break;

		case PIN_CONFIG_DRIVE_STRENGTH:

			arg = pad->drive_strength;

			pad->drive_strength = arg;

			break;

		case PMIC_MPP_CONF_AMUX_ROUTE:

			if (arg >= PMIC_MPP_AMUX_ROUTE_ABUS4)
@@ -507,6 +507,10 @@ static int pmic_mpp_config_set(struct pinctrl_dev *pctldev, unsigned int pin, 
	if (ret < 0)

		return ret;



	ret = pmic_mpp_write(state, pad, PMIC_MPP_REG_SINK_CTL, pad->drive_strength);

	if (ret < 0)

		return ret;



	val = pad->is_enabled << PMIC_MPP_REG_MASTER_EN_SHIFT;



	return pmic_mpp_write(state, pad, PMIC_MPP_REG_EN_CTL, val);